Instead, those users end up using the ARM apps via an emulator, and that makes them even slower on an already slow cheap phone.
End result: RISC-V gets a reputation as a very slow and very crap CPU architecture. Just like MIPS and x86 on mobile got.
Instead, those users end up using the ARM apps via an emulator, and that makes them even slower on an already slow cheap phone.
End result: RISC-V gets a reputation as a very slow and very crap CPU architecture. Just like MIPS and x86 on mobile got.
If you put RISCV and ARM assembly next to each other, you’ll see that RISCV is much easier for humans. The vector extension is also much easier to understand than SVE.
I believe porting old NEON too RISCV vectors will be easier than porting to SVE.
It can be done, using mix of native applications and emulation. And as long the emulation speed is indistinguishable from native (Like Rosetta 2), end users won't notice it and won't complain.
Google & Meta can team up to transition all their apps to RISC-V and that would be 70% of the most used daily apps, other will follow the lead.
I think they'd been working on it for many years beforehand. Getting the software stack ready for a new architecture, especially one where there is a lot of 3rd party code you can't touch, is a lot of work.
After all, step one was porting their darwin kernel in 2007. Then the 'Unified Platform' work of 2017 made the userspace work on ARM... Then 2020 they released an ARM desktop product... So it was a lot of years!!
Obviously a monorepo of largely FOSS is easier to deal with than random Android apps but I don't think it's that dire or insurmountable.
Apple could do Rosetta 1 and 2 because the emulated CPU was considerably slower the new architecture. No evidence at all that this would be the case here.
Transmeta is different - Transmeta Crusoe etc. were a weird VLIW-like ISA plus their ISA-specific code morpher sw.
Apple started a lot earlier than the announcement and hasn't completed the transition yet (Mac Pro). A lot of companies better have had RISC-V initiatives in the pipeline already.