I'm confused in that what it looks like is all you need to do is design a schematic and place chips down on to a PCB and then write software drivers. I thought chips had to be coded too.
See its pinout - site is in German but there is a nice diagram. https://de-academic.com/dic.nsf/dewiki/643647
The lines marked Addr are address lines, and Data are data lines. Things that appear readable/writeable to the CPU as RAM manipulate the MEMW/MEMR lines, and things that appear readable/writeable to the CPU using its "I/O port" instructions manipulate the IOW/IOR lines. I don't know the low level protocols used there but there is definitely one and why some simple logic chips had to often be added I guess (74SNxxxxx chips very common).
RAM basically does the same thing, as well as anything built in like the clock chip, keyboard controller, serial ports, floppy controller, etc.
One big disadvantage of ISA is that the bus when it was introduced had to run at the same speed as the CPU. When CPUs started getting faster than 8Mhz something was done to keep the ISA bus as 8Mhz, but not sure what.
The other big disadvantage is that this was intimately tied to the 8088 Intel CPU signal lines. PCI (and other things like NuBus and MCA) were CPU independent and required a chipset or other controller to interface, and that's where the complexity started to take off.
You just set an address and write/read data to it.
All you need to do simple input/output on it is to
* wait for "right" address on bus and "right" pins to light up * either latch the data, or output the data * bang the right control bit.
It is entirely doable using basic logic chips, because back then any kind of programmable logic was super expensive.
Compare it to usb-c where you need tens of thousands of lines of code to even negotiate some power stuff (or use specialized chips... that have those tens of thousands of lines of code baked in).
You can find the list on the Github page of the project: