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Comment by georgelyon | Hacker News Reader

If M2 Pro is similar to M1 Pro (two M1s duct-taped together with very fancy duct tape), this is interesting because usually chips need to be significantly reworked for a newer process and this implies an M2 core complex will be printable both at 5nm and 3nm. It would be interesting to know how much of this is fabrication becoming more standardized and how much is Apple's core designs being flexible. If this is the latter, then Apple has a significant advantage beyond just saturating the most recent process node.

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The M1 Pro was not two M1s duct taped together. Their core configurations do not share the same proportions (8+2 vs 4+4).

You may be thinking of the GPUs? Each step in M1 -> M1 Pro -> M1 Max -> M1 Ultra represents a doubling of GPU cores.

Or you may be thinking of the M1 Max and Ultra. The Ultra is nearly just two Maxes.

Regarding your point about flexibility, it’s hardly unprecedented for the same core to be used on different processes.

Apple has at times contracted Samsung and TSMC for the same SoC. Qualcomm just recently ported their flagship SoC from Samsung to TSMC. Even Intel backported Sunny Cove to 14nm. And of course there’s ARM.

>> Apple has at times contracted Samsung and TSMC for the same SoC

That was only once at 14nm(Samsung)/16nm(TSMC) as Apple outsourced US chip production in TX to Taiwan.

Qualcomm uses both TSMC and Samsung on rotational basis to this date.

There was some speculation in another thread not too long ago that the M2 design was originally 3nm, and was backported to 5nm after the fact.

I mean, Intel used a "tick-tock" model for a decade. (New microarchitecture, then die shrink, then new arch...) https://en.wikipedia.org/wiki/Tick%E2%80%93tock_model

I wonder if they'll also bump the M2 machines to 3nm silently, if the efficiency bump is minor? Apple previously split the A9 between TSMC and Samsung at two different node sizes, so it wouldn't be completely crazy.

Or perhaps they're content to leave the M2 as 5nm for easy performance gains in the M3 next year. It also has the advantage of keeping the cheapest machines off of the best node size, which is surely more expensive and more limited than 5nm.

I think you're thinking of M1 Ultra - which is 2x M1 Max on an interconnect.

M1, M1 Pro and M1 Max are separate dies.

There's no reason to assume that a 3nm and 5nm M2 core is identical in that way. It's probably similar to the changes Intel used to do for die shrinks when they were doing tick-tock.

you are mixing M1 Ultra which is two M1 Max taped together with M1 Pro which is a weaker variant of M1 Max.

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