As someone else here said, fab nodes are more like Lego blocks than a printer’s dpi – moving a design to a new node means rebuilding it in terms of the new node’s building blocks, not just “shrinking the design”.
So if the M2 Pro/Max/Ultra are intended to follow the same “reuse the cores (possibly rearranged) with more GPU blocks/cache etc” it seems unlikely. But if the make a design break within the M2 series then it’s possible?
I’d expect Apple to follow their historical behavior and lead with the next A-series phone processor on the new node first. M1 Pro/Max/Ultra chips have huge surface areas – since process defect rates are driven down over time, it makes sense to start with your smallest chips first, so that you can get good yield out of your big chips once the defect rate is lower.
So not sure it's true that you can't shrink down a largely similar architecture from one process to another.
Obviously it's fallen off the wagon a bit here, but seems more due to operational issues at Intel than it being fundamentally not doable
The first step is to prove the process - to the appropriate level of control limits, and then the second step is to optimize the process.
You may say it's "significant", but if you look at it another way, it de-risks both tasks as opposed to doing both at the same time but having much higher risk.
So in my mind, the "significant work" is less relevant, as the derisking is much more important.
The hardware side's optimizing the process on the first cycle, then doing a new one on the second.
Can you imagine having to live this life? Port to a new platform every other release?
There was work for sure to move to a new process, but that wasn't necessarily duplicated work with the architecture being created on a prior process. My impression was that it was already parallelized, and that not having to develop new architectures on new processes prevented a fair bit of contention.
- A5(X) 32nm and 45nm - A9(X) 14nm and 16nm - A10(X) 16nm and 10nm
If apple wanted to use N3 for the A15 or the M2 then they'd have designs pretty much ready but due to TSMC delays didn't roll those into production.
I'm pretty sure Apple does a few designs in parallel and react according to what the supply chain and market conditions allow.
Indeed, the core designs were different. The M1 had A14 CPU cores, while the pro/max were based on the A15.
A14 —> M1 A15 —> M1 Pro/Max/Ultra, M2
So it stands to reason
A16 —> M2 Pro/Max/Ultra, M3
Though that does not take into account the process node.
'We had indicated in our initial coverage that it appears that Apple’s new M1 Pro and Max chips is using a similar, if not the same generation CPU IP as on the M1, rather than updating things to the newer generation cores that are being used in the A15. We seemingly can confirm this, as we’re seeing no apparent changes in the cores compared to what we’ve discovered on the M1 chips.'
And Wikipedia: https://en.wikipedia.org/wiki/Apple_M1
'The M1 has four high-performance "Firestorm" and four energy-efficient "Icestorm" cores, first seen on the A14 Bionic. [...] The M1 Pro and M1 Max use the same ARM big.LITTLE design as the M1, with eight high-performance "Firestorm" (six in the lower-binned variants of the M1 Pro) and two energy-efficient "Icestorm" cores, providing a total of ten cores (eight in the lower-binned variants of the M1 Pro).'
The efficiency cores on the Pro and Max aren't (so far as I can tell) faster than on the regular M1. But where the regular M1 has 4 performance + 4 efficiency cores, the Pro and Max have 6 or 8 performance + 2 efficiency. (Also, more L2 and L3 cache.)
[1] https://www.macrumors.com/2022/08/18/m2-pro-chip-3nm-product...
This is true but 'rebuilding' specifically refers to producing a new chip layout (i.e. the thing you send off to the fab to manufacture). This can be a lot of work but is all 'back-end' work. You begin with the RTL giving the logical/functional design of the chip and implementation engineers push it through synthesis, place and route etc to produce a physical chip layout. This is what you have to redo, you can just start with the exact same RTL.
When you design that RTL with a particular node in mind you can likely achieve better performance/area but it's not essential to do so.
Plus when you want to do the back-end work you need a fairly complete design to work from. So for instance Apple could be getting a back-end team to build a 3nm M2 now whilst the front end design team are busy working on the M3 (specifically targeted and optimized for 3nm).
They can't release 3nm A16 this year. I'm pretty sure it's on something like N4P.
Actually thinking a bit more... there is the Apple VR headset which seems to be getting closer to production and I'm sure it could use the efficiency from the new node plus is priced high enough to warrant the costs. Some speak of a launch beginning of 2023 with 1.5M units produced. That would be bang on in terms of schedule.
So it isn't outside the realm of possibility that the A16 design is 3nm, and they will delay its launch and/or otherwise make it less desirable to deal with lower initial production yield.
The A16 will be N4P I'd guess. In my initial comment I should have said A17 for N3 instead of A16.
IMO, the plain M2 was a 3nm design that had to be backported to TSMC 5nm due to the node transition taking longer than projected, in the same way that Intel's Sunny Cove had to be backported from Intel's 10nm to their 14nm++++++ node.
The rumors now say that Apple is getting ready to build M2 Pro and M3 on TSMC 3nm.
>According to one analyst, they will be coming from TSMC, and will debut later this year. Even more tantalizing is the notion that these Apple SoCs will likely be the very first to use TSMC’s bleeding edge 3nm process. This is mildly surprising given the M2 chip revealed this week was made using TSMC’s 5nm process, just like the previous M1 products. Launching the M2 on two different nodes would require Apple to do the design work twice — once for a 5nm M2 and once for the 3nm M2 Pro.
https://www.extremetech.com/computing/336862-apples-m2-pro-c...
My wild ass guess is that the M3 they are talking about here is the original M2 3nm design that was delayed.
e.g. no reason to believe. Everyone here is "an analyst" in that sense.
There’s an M2 Pro chip and an M3 chip in the works, according to industry publication DigiTimes.
https://www.digitaltrends.com/computing/apple-to-deliver-3nm...