The tooling ecosystem that adds joy to KiCad
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P.S. If there is interest I will look to document my workflow.
As a software guy who occasionally does a test or automation fixture, I find the workflow of most EDAs a bit strange. It seems to actively discourage reuse.
Everyone seems to have their own stash of footprints and known good circuits.
I'd love a Footprint Club that looks at what people have been making for themselves, accepts submissions, and cleans them up the popular ones for upstreaming. Hmmmm.
Unfortunately even professional EEs struggle with using standardization to their advantage, I have found. Partly this is vendors' fault as they don't make things clear at all. Partly it's just a nice competitive advantage for me and my employer as we spend far less time on footprints and have far fewer footprint errors, so I guess I shouldn't squawk too loudly....
Is it documented and traceable now? It didn't seem to be last I looked, but I admittedly didn't look too hard (I've been using Altium for years). This is critical for a standard library: parts need to be compliant with standards (usually IPC-7351 plus the mechanical standard for that part), they probably need to be put on a grid (and it should be the same grid for all parts), and things need to be documented to the point that I can trace where that footprint came from, why it has the dimensions it does, and what it's good for. None of this is all that nasty, but it's the difference between "Footprint Club" and "Standard Library". Oh, and you probably need to record usage, since something that's been hand-assembled once is very different than something that's been used in production a couple million times.
> manufacturers just puke out special footprints for any random thing
Tell me about it! That said, familiarity with the standards will let you conclude that many things that look like they kinda-might-be standard but aren't obviously listed as such actually are standard things. This is key to saving time with a real standard library. (Diodes are the worst offenders here. The worst.)
> You've just got to make it, period.
Also known as "the refrain of the connector". Fuck connectors.
I'll see what I can do to write it up.
> As a software guy who occasionally does a test or automation fixture, I find the workflow of most EDAs a bit strange. It seems to actively discourage reuse.
Being able to re-use Python code sections is obviously quite cool.
I don't yet have a good solution to footprints, but slowly but surely getting there with the tooling.
It would be like suggesting that there is no point having LaTeX perform typesetting because the research takes so long anyway and you like typesetting your documents. I personally would rather spend that time doing something else and let the machine get on with it.
I'll coin a new term here to classify this kind of problem: NP-incomplete. A problem that's known to be NP-hard, and is actually now impossible because you the program doesn't have all the information it needs to solve the problem.
To properly route a board, the tool would need to know what kinds of loads are at each end of a net, how thick the trace needs to be, where the return path for the current loops involved are, the edge transition times of all signals on the board.
You have to know not to route delicate high-impedance signals next to high dV/dt power traces, how to properly split and combine ground planes, how to respect creepage/clearance requirements for voltage isolated systems, etc.
About the best we can do today is to use autorouting for not-so-critical traces after the work for everything else is done, and even then it only really works well when you have PCB area to spare. In the worst cases, like some 2-layer boards, an autorouter will inappropriately chop up your ground plane with the traces it needs to route and turn what was a good board with solid return paths into a poorly routed mess.
The reason autorouting sort of works in VLSI devices is because all of these requirements are baked into the tools themselves. Every signal has a timing requirement, an impedance requirement, fanout limits, etc. When you are only dealing with digital logic, it makes the job much easier.
It turns out that manually programming paths to account for those issues actually generate hundreds of saved production hours per year.
With 80% of my time being just the data sheets, application notes, and component selection.
It's really remarkable just how little time I put into the actual mechanics of building a PCB vs. everything prior to that.
The jitx folks used to talk a lot about making test jigs and adapters for people, which is a simple enough application that a text-based system could really shine at.
Boards with power circuits and micro-controllers. I'm not sure I would trust the routing software when it comes to a high-speed bus or radio just yet.
> There was no easy way to combine schematic and skidl-based circuits. This was a problem at a company environment where design reviews become impossible because nobody else could write their heads around a power converter circuit made in skidl.
You can output a schematic: https://devbisme.github.io/skidl/#svg-schematics
I haven't got a solution for half-and-half skidl and KiCad designs.
> I really like KiCad's backannotation feature for adjusting BGA fanouts and whatnot from the layout.
I've not tried this so can't comment on it.
It depends what your background is. For example, to wire up a header to an ATmega328, I wrote this:
micro = Part("MCU_Microchip_ATmega", "ATmega328-A")
micro.footprint = "TQFP-32_7x7mm_P0.8mm"
u_head = Part("Connector", "Conn_01x32_Male")
u_head.footprint = "PinHeader_1x32_P2.00mm_Vertical"
for x in range(32) :
micro[x + 1] += u_head[x + 1]
> [..] unless you already have a schematic (which seems redundant).
It can also output schematics. So you're just working on the skidl Python file.
> Freerouting seems like a good way to iterate quick solutions to routing approaches, but obviously has a lot of limitations.
Of course, I personally wouldn't use it for a high-speed bus or radio circuit, but otherwise it is quite reasonable.
There is a generate_pcb() function in SKiDL that will output a kicad_pcb file that can be directly opened using PCBNEW (no need to generate the intermediate netlist file). That function uses HierPlace to group the parts based on their hierarchical organization. That would be a good place to inject some autoplacement if you get it figured out.
Additionally the 3d export is good enough now that you can import it into Blender and do something like this within a few hours: https://www.youtube.com/watch?v=svU7NyfJJKY
- being able to tag a commit, which automatically updates silkscreen with tag name/board revision and commit date.
- being able to run automated checks on outputs (are part numbers defined for all components? are they valid? are they in stock?)
- not being able to produce outputs if DRC fails (I have messed up real bad by exporting gerbers in Altium with shelved polygons)
- all of the outputs are produced at the same time (I have messed up with re-exporting gerbers but not BOM)
- making sure that design is atomic/does not depend on libraries present only on a particular machine
I recently went one step further and set up CI job to check symbols in my personal library using kicad-library-utils (which performs the same checks as for the symbols in official kicad libraries, which ensures consistent style and allows for custom checks (e.g. MPN/Manufacturer fields present).
I much prefer using a formula based tool to make packages for a specific part's mechanical drawing, I just don't trust what other people have made yet. I'd like to be able to but the trust isn't there yet.
Maybe kicad could list parts as verified against a standard footprint based on user feedback so that I know that whatever random part number actually fits this particular soic wide or whatever bga pattern. Maybe a part number has no notes but it's nice to know that no one has checked it manually yet too. Like the wine database.
Maybe it already exists, I haven't found it yet.
Unfortunately, companies like SnapEDA bring negative value to the industry because they produce crappy libraries that you can't trust.
So, they reduce pressure on the parts vendor to produce a decent symbol/model. At the same time, I can't trust the symbol/model until I check it personally and run it through a project. And, finally, some contract terms generally prohibit me from redistributing that symbol (go check the terms you agreed to when you signed up).
SnapEDA and their ilk need to die in a fire.
On top of the other answers: a much more friendly UI. Blender used to have a horrendously steep learning curve because the UI was just alien and ignored most agree-upon convention used by other 2D and 3D packages.
Not the case anymore, Blender is much more user-friendly and beginner-friendly.
The huge amount on online video tutorial also helps tremendously.
That way you're climbing the "using the tools" learning curve separately from the "laying out designs" learning curve, which makes it all a lot easier.
Orcad is, I dunno the Catia? Was the "serious" software back in the day so preferred more by greybeards who scoff at using amateur stuff like Altium. Interface is much more dated and less intuitive. A company I worked for had a mild mutiny because they hired an Apple guy that insisted that everyone learn and switch to Orcad and the EE team just balked at it.
If Kicad can catch Altium on usability and handle dense, complex boards then it could be the best package out there. Just the fact that they actually fix bugs puts them at an advantage. They may already be there, I haven't played with it in a while since I'm at an Altium shop.
+ at least I don't have to generate my own bog-standard 0402, 0603 resistor/capacitor footprints,
+ a lot of the standard IPC-something footprints are included in kicad standard library (e.g. SOT23, SOP8, etc)
+ you can easily copy an existing transistor symbol, assign it a particular footprint you've verified and save to your library).
- Altium has a lot more built-in wizards for symbol and footprint generation. There are some online kicad symbol library generators and a few built-in footprint wizards, but I believe AD has more.
The Altium online component library probably does provide a larger selection, but I personally don't really trust it to be around forever. I'm also not sure if you don't need an active altium subscription (5000-8000USD/yr/seat) to have access to it.
[1] https://www.reddit.com/r/KiCad/comments/icqvfi/no_autoroutin...
But the real payoff will be in automatic component placement, since that's 85% of the work anyway. And I think the same trends apply there too, it will just take longer.
I wonder how much separable the problems of placement and routing are. That said, I'd love to see a function in KiCad that does auto-placement (more than I want auto-routing).
Many current autorouters already use "AI" (often genetic programming).
My understanding is that it sounds great but the one magical part about the EE domain is we have an absurd selection of ICs being made every day by companies that are tailor made for every application under the sun. It's the best way to cut physical hardware costs down by every penny possible for volume manufacturing and it's trivial for a human to design schematics and board layouts tailored to the chip in the grand scheme of things.
The problem then becomes that the AI would need to be constantly trained on newer and newer human designed samples for each new chip to keep up.
> What KiCad does have is "push and shove" routing, which is really nice. As you're trying to manually route a new trace, it will push existing traces out of the way as you incrementally route the new one. This is a huge time saver as you manually route your board.
They mention a host of things that the autorouters are bad at as evidence that autorouters are useless, instead of recognizing the opportunity to improve autorouters to make their jobs easier.
The 'travelling salesman' argument was my favorite though, because it's somehow okay for a human to provide a working but non-optimal solution, but the bar for the computer is finding the optimal solution.
That said, they aren't completely useless (though I've never had a case where I needed it), but they are also a very high effort to improve: it's a thorny optimisation problem to start with, but also what is not appreciated is it's also a really difficult user interface problem, since the designer needs to be able to specify the requirements to the autorouter in high precision enough to get a good result, while also taking less time than just doing the routing themselves (which for experienced PCB designers is not really that long for most cases), especially when placement is just as important for a good result, intermingles with routing to a large degree, and is even harder to specify (placement depends on finding a good compromise between thermal, electrical, and mechanical goals, all of which are difficult to specify precisely).
Given they're a big trap to newcomers and also a huge amount of effort for something which has pretty niche applications in practice, I'm not suprised the team behind KiCAD decided it was not worth the effort. If you (or someone else) thinks they can make a more useful one, it's definitely a space where improvements on the current state of tooling can be improved, but don't underestimate the effort involved.
>The designer needs to be able to specify the requirements to the autorouter in high precision enough to get a good result, while also taking less time than just doing the routing themselves
Aren't most of those rules the same between projects. Once you have a good setup you're good to go on many projects?
Now what if the board is more complex? You have some sensitive analog signals, high speed digital signals, and some RF stuff that. Do you take the time to set up a room in Altium with special rules for the RF stuff? Make some complicated rules so that the high speed digital would mess up either of the other things I mentioned? Could be done, but the trial and error of getting all the design rules right is probably more work than just doing it.
The problem is that easy stuff is easy, and doesn't need an autorouter. Hard stuff is still hard with the autorouter and unlikely to save that much time. It's hard to find a use case where you come out ahead. Maybe a board with a massive amount of GPIO and nothing else?
I, too, am amused by how wound up some people get about this. It's a tool.
Another big part of why the autorouter might underperform is it's entirely subject to where you've put the components, whereas a human will generally do placement and routing in parallel to at least some extent. Placement is if anything the harder problem in PCB design and there's no systems currently that really combine the two operations (there are auto-placers but they're generally even worse than autorouters, for similar reasons of the requirements are complex and hard to specify).
In general these kinds of systems run into a bit of a catch 22: in order to use them well you need to have enough experience to do the job yourself, and be able to effectively evaluate the output. But when you have this you find it's faster and easier to do it yourself. And expecting it to be helpful for beginners is a bit like expecting github's copilot to be a shortcut for beginners: the tool is going to throw out bad results sometimes and the beginner is not going to be able to evaluate that or know how to fix it.
Like I said, I think there's room for improvement here, both in terms of interface and in terms of algorithms. But it's far from non-trivial. As for TopoR, it does look like one of the better options, and I really like that it's challenging the 45 degree orthodoxy which is basically a relic from limitations of early PCB CAD which is sadly still solidified in the tools (even in a modern PCB CAD tool it's hard to route something at an arbitrary angle, and it tends to break routing features like push-and-shove), but I haven't had a situation where I've been looking to try it myself (part of this is PCB routing takes up a relatively small portion of my time: if I spent 70% of my time doing it like some specialists I would definitely be spending more time trying to optimise it. As it is it's about 20% of time I spend designing PCBs and I spend less than half my time at work designing PCBs).
The real problem that needs to be solved is automatically placing the components optimally, not routing the PCB. Routing the PCB is just colouring in.
Sounds like a job for DL! No, really, I'm serious.
If you can feed in enough existing layouts, and give the inputs enough information in terms of what signals are differential pairs, what is the intended impedance, what is high-speed, etc. it might be possible to have a system learn how to do this.
I'd think there's enough gerbers and such laying around the Internet from reference designs to have a big enough data set.
Free business idea for anyone who wants to disrupt the EDA market...
You can get away with murder at 1MHz if your trace length isn't too bad but you absolutely do need to worry about signal integrity over that speed or large boards.
When I was a beginner starting out with 65C02's my autorouted boards would work fine around 1MHz but it was impossible to get them working at all at 10MHz until I rerouted the board by hand taking care to think about signal integrity, current return path etc.
Things like trace length, reflections, power dips when the bus is all 1's, electro and/or magnetic crosstalk, etc. become an issue at around 50MHz, although I've never gone that high in a hobbyist design...
When a bunch of professionals say that something is useless, pehaps you should pay attention?
The problem is that most PCB boards are extremely constrained routing environments. The boards that KiCad is used to design are extremely so. Vias go completely through the board. Even worse, vias tend to be larger than tracks. Consequently, changing a layer is expensive and introduces more obstacles. Your subcircuit part is also an obstacle on your routing layer. And, generally, you only get 2 "routing" layers (top and bottom) since the other two layers are used to route power and ground.
There is a reason why boards that have FPGAs on them tend to use blind vias which don't penetrate the whole board--they can't route to the balls otherwise. They also tend to be 8+ layer boards. This represents real money and if people could do otherwise (either by hand or autorouter), they would.
However, let's back this out to somewhere that "autorouters" are actually useful--VLSI. As someone who has done VLSI design for a very long time, I can pinpoint the moment when VLSI autorouters went from useless to useful--when metal layer counts hit 4+ layers (local connect, horizontal connect, vertical connect, and power layer).
VLSI does not have the same obstacle issues that PCBs have. Vias only go layer to layer unless you design otherwise. Vias also are smaller than tracks. Consequently, you can practically guarantee that you can interconnect things with enough space. Your subcircuit doesn't also interfere with one of your routing layers. And VLSI design has a LOT more money to throw at developing autorouters.
Even so, VLSI autorouting and placement still looks like crap 25 years on. Nobody has yet been able to come up with an autorouter that can identify a datapath and lay things out in a coherent fashion. And there is good money in doing so.
People like you then come along and are suggesting that the KiCad developers spend a lot of time, on a known very hard computational problem, that people failed horribly to solve in the past with a lot more money and will likely only work well on a minority of expensive PCB boards (8+ layers with blind/buried via).
Color me unsurprised when the responses are less than hospitable.
Although i prefer to route critical stuff by hand (high current, high frequency, differential pairs, etc...) and let the autorouter to do the rest.
But it's written in Java, which is not really my personal preference. Also there was some performance issue when board outline contained arcs, so i had to convert them to series of short lines which reclaimed the autorouting speed.
KiCad's "autorouter" was simply some button integration for use with Alfon's autorouter distribution back in the day. There's a plugin located in the freerouting/freerouting project that adds that button back to KiCad 6.
The real problem is that third party tool went abandoned for years due to a major CAD company claimed copyright ownership due to the author's former employment with them (the traditional ownership of IP in employment).
That former author of the router, even though he disputed the timeline of the code's creation being outside employment, basically said "I'm in retirement on a fixed income, fuck this I ain't dealing with it" and abandoned the router. Then over the last 8 years there were random forks that quickly petered out because well, it's all very very niche software.
The KiCad project isn't touching that code due to (a) it being in Java when everyone is a C/C++ domain expert (b) the legal claims by that big company basically make that specific codebase poison so we need to stay away from it.
As for creating a new autorouter, it has come up multiple times. The problem is, anyone can create a autorouter but a good one is a whole different ballgame The best way to describe the problem is while the PCB layout is 2D. Routing is actually a multi-dimensional problem requiring input of all kinds of parameters to do it good. It's just we are a small group of electrical engineering oriented guys and we just don't have the interest in spending our limited free time on it.
We are totally open to somebody contributing it, but alas, everyone expects us, the active contributors to do it instead. You know, that horrible pitfall of open source.
I love KiCAD, but last I used it, this was a huge PITN.