I've recently started looking at them. The SDK is nice except that they chose to use CMake. I designed it out:
I've recently started looking at them. The SDK is nice except that they chose to use CMake. I designed it out:
it isn't
An extra chip means higher cost to produce & assemble board, larger board size, more pins wasted on this nonsense, most fast-edge signals to route, more passives, extra risk to handle for one extra chip being out of stock, and it is much easier to extract firmware than even from a "protected" stm32
Also wasting RAM (and power for it) on code, or random (between high and very high) latency of XIP from SPI flash
Another similar chip is the i.MX rt1020 from NXP (except Cortex-M7 and way more expensive). The one gotcha was that there was only one QSPI-flash controller even though there were two ports. It meant that the extra port (which we assumed would be available during architecture) was not fully usable without interfering with the firmware.
for what? What sort of possible thing would you need to do on a c-m0 that needs more than 128K of CODE!?
in NOR flash???
:cringe:
What seems like a huge amount of Flash disappears quickly.