So they have to deal with whatever issues Infineon has. It's part of the risks of being on the bleeding edge. That's why even luxury German car companies usually stay on older tech.
So they have to deal with whatever issues Infineon has. It's part of the risks of being on the bleeding edge. That's why even luxury German car companies usually stay on older tech.
Just because they fab NAND, DRAM, and cutting edge logic chips, don't mean they can switch to high performance analog chips on a whim.
There's a reason, Infineon, TI, Vichay, and other's are still highly profitable.
Sure, the people who design logic transistors would probably adapt quickly to designing power transistors, but they are a very small part of a very large machine. For example: a digital organization may have learned through harsh and repeated lessons 100 subtle ways to be more conservative about device changes. FinFETs took 15 years to go from R&D to prod, for example. While this level of risk aversion might be critical for shipping billion-transistor devices, it may be maladaptive for shipping single transistors, where a 15 year deployment leaves you 10 years behind your competition.
Likewise, the processes (patterning, etching, implantation, etc) are largely similar, but the digital side has made colossal investments optimizing for things that just don't matter as much for analog design. The famed EUV machines? What does a power transistor gain from tiny features? I'd be surprised if they were useful, let alone useful enough to justify the cost, let alone useful enough to justify the cost and the risk of repurposing a machine for process innovation. Like using a F1 car to commute to work -- even if cost were no object, extreme optimization for one purpose makes it worse at others.
Same with gate design.
For digital, the transistor are CMOS, optimized to be as tiny as possible, running at < 1V, and with individual devices mostly driving microamps, going up to milliamps in some particular areas of the chip.
For power, we're talking about IGBTs, optimized to handle as much power as possible with maximum efficiency, at hundreds of volts.
They are both semiconductor devices, but they are about as similar as the engine for a sports car vs. for a panamax cargo ship.
The dielectric breakdown voltage of SiO used on wafers is about 2.7x10^9 V/m (2.7 V/nm) so a 600V part that relies on SiO for insulation has to have a minimum gap of at least 222 nm [2] between any conductors that carry that voltage. Cutting edges nodes manufacturing CPUs and stuff generally deal with single digit voltages so while a lot of knowledge can carry over, the meat of the designs are very different.
[1] Even a perfect vacuum would breakdown due to the Schwinger effect, but at an astronomical voltage potential like 10^18 V/m.
[2] It's actually a lot more complicated at that scale, but it's a useful ballpark value.
https://www.caranddriver.com/news/a28903284/porsche-taycan-e...
IGBTs are not quite a commodity at highest specs, and power modules are yet another years-long development. Infineon has been building modules with high power density for decades and that experience will also carry over to SiC chips. Where I'm at we are building our own SiC "modules" from discrete components for now and these are much larger than Infineon power modules - but we are air cooled ;-)
It seems like there should be a standard form factor for 3-phase power modules by now. That would make them easy to replace even if you have different specs.
Taycan uses cree sic, bleeding edge. GM signed up for those too.