Tang Nano 9K – FPGA SBC with HDMI

IIRC the "Apicula" project for yosys/nextpnr support for Gowin FPGAs is pretty good, but still lacks a few key features for many designs - most importantly, Block RAM, but also PLLs and I think serdes/transceivers?

I have one of the "4K" versions of this board (which also has an onboard Cortex hard core) and unfortunately still have to use the Gowin EDA suite for a lot of projects.

It's getting there, though!

Depends on what you want to do. For blinking some LEDs be prepared to write some asm level code. For gigabit transceiver system prepare to deep dive into complex IDE from the manufacturer. I am here minority claiming, that vendor tools are okay. Everybody else wants open source toolchains. Last week I dealt with complex clock distribution problem in my design. It was easy to debug it with vendor tools. I don’t know how far are these open source toolchains in such complicated matters.

How comfortable are you with functional programming? I've found digital logic to have more in common with describing data transformations than C/ASM, though understanding bitmasks/bitflipping helps.

It's not hard to get into at all, if you're already comfortable thinking in terms of bits and digital logic.

Usually it's fairly simple to get your feet wet and a blinking LED. The problem with FPGAs tho is that you basically have to do everything yourself and apparently it's not easy for a lot of people to "get it".

Even tho Verilog and VHDL look like normal programming languages, you aren't actually programming. You are describing hardware/logical circuits. Most things run, by default, in parallel, which you always have to keep in mind. But then there are things like processes which are evaluated sequentially, but they still behave different than a C-program.

You could also use external IP-Blocks to not be forced doing everything from scratch, but they are not always easy to work with.

So my (personal) conclusion is: It's not hard to get it running. You could easily do that. Personally I would prefer to go with Xilinx or Intel chips, just because you have more resources and a kind-of working IDE. Or you could go with some Lattice ECP-5 based chips and use the open source toolchain yosys etc. It can be a super exciting experience, but a lot of people just seem to find it boring. I am personally very grateful that I had an exceptionally good professor in uni that thought us most things.

One caveat on tooling: unless things have changed recently it's an overwhelmingly Windows-centric ecosystem. That honestly been the biggest barrier to entry for me using fpgas in hobby projects.

Not difficult, but feels weird. Vhdl looks like programming, but all the rows are executed in parallel all the time. You need to wrap your head around that level of parallelism. But once you do, I'm sure it'll also make you an excellent CUDA / OpenCL GPU programmer.

How comfortable are you with logic gates? I found it pretty easy to get into with similar background, but it was crucial for me to think in terms of wires, logic gates, flip-flops and multiplexers.

Like, you're not assigning a value, rather connecting an output to an input with a wire. You're not writing traditional sequential statements, but wiring logic gates (level-based) or hooking up flip-flops and latches (edge-based) to implement state machines.

With this in mind, I got a very simple soft-CPU going in very little time.

I found it more difficult to get data into or out of the FPGA though. Things like I2C which is trivial with a microcontroller that has I2C peripheral is suddenly not so fun.

I’ve done it myself and found it not too bad. I was already familiar with the underlying paradigms of digital circuitry so it was mostly a process of struggling with tools until I got a good flow. Using obscure boards (lattice vvml) with obscure languages (chisel, myhdl, spinalhdl) and obscure tools (nextpnr, yosys) has been an exercise in careful reading of documentation and disciplined experimental strategy.

See if you are comfortable playing in https://github.com/logisim-evolution/logisim-evolution

PYNQ is an interesting project. It blends python / jupyter notebooks running on the embedded processor in the FPGA ps with any custom hardware you design for the FPGA pl (programmable logic). You can generate the hardware logic by writing a Verilog module, or else using HLS which is a flow for taking c code and creating hardware. It's a really fun environment. You'll still need to grok the HW side, but thats part of the fun!

From my (very brief) experience with FPGAs, for every popular IP block you can usually find an open-source equivalent that does the equivalent. Certaining for HDMI, I've used hdi-util from GitHub before and it worked on my old Cyclone II. They aren't very well optimized more often than not, but can save you a few hundred £€$¥ on licensing fees.