Binary Translators for Weak Memory Model Architectures

binary-translation.github.io

29 points·hasheddan··10 comments

Or do what Apple did and addon an x86 memory semantics mode for ARM.

Obligatory Alan Kay quote: "People who are really serious about software should make their own hardware."

This ("TSO") is actually an ARM standard however its only very latest ARM (v8.4-v8.7) and not many other CPU implementation currently. AWS Graviton 3 and maybe very latest phone SoCs if I understand correctly.

https://news.ycombinator.com/item?id=31664688 https://twitter.com/marcan42/status/1534053625110351872 https://twitter.com/never_released/status/153412764108259328...

TSO is not architectural.

As far as I know, for "emulation" they are still using x86 memory model, which is making binary translation much simpler. I am not aware of any MCU/CPU, which would be able to just change its memory model / peripheral mapping as it pleases.

Is there supposed to be more content on this website? Both of the links on the main page lead to stubbed pages; the one for the SBT (Lasagne) has a GitHub link to a different static binary translator from 2015 (Microsoft's mctoll).

Edit: From the paper[1], Lasagne is based on mctoll?

[1]: https://binary-translation.github.io/pubs/pldi22-lasagne.pdf

obviously an too eager submission. out of 5 planned pages, only one is done yet. let's check again in two months

An interesting paper. Do you know books/papers to learn more about memory models?

Russ Cox has a few good explainer blog posts: https://research.swtch.com/mm

Many thanks.

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