Upcoming RISC-V laptop promises free silicon upgrades
arstechnica.com
arstechnica.com
Besides not publishing pricing or detailed specs this close to the planned shipping date, this rings so many alarm bells.
Modern technology often requires tighter integration. We accept integrated circuits because we're accustomed to them. But then people flip out when they see what's effectively a naked module because it looks like a greedy version of the old thing.
Is it me or is one of the main RISC-V advantage is that it's free of mandatory backdoors ? Why would you need this enclave ?
If the chip can be disabled or if its firmware can be controlled with custom signatures (i.e. a ROM managed through an open boot mechanism such as coreboot) then I don't see any problems with such a core, even in a fully FOSS system.
It's unlikely that this freedom will actually be given to customers, but I don't see any theoretical problems here.
And now, time to write some assembly (without abusing the assembler preprocessor...), coze compilers (aka backdoor injectors, or absurd and grotesque bloats) should become, finally, useless (well some hardware vendor drivers will be provided as gcc/linux C dialect...)
https://www.cs.cmu.edu/~rdriley/487/papers/Thompson_1984_Ref...
If it was easy, it would not need firmware in the first place. Firmware is there because people expect certain features and quality of life. See softmodems.
> write some assembly (without abusing the assembler preprocessor...)
You want https://terralang.org/ and not "just C"/"just Assembler" instead ?
IME is a bad example here. That's an entire upgradeable MINIX OS embedded in your system - if it was really firmware, Intel would not be able to update it, or you be able to neuter it.
if risc-v is a success we don't need anything except a risc-v assembler: then the main pitfall would be the abuse of the macro preprocessor.
Nvidia believes in shipping a garbage, throttled down and limited firmware to get you some initial rendering, but if you need anything that's not basic rendering, you load a proprietary signed blob, with proprietary "microcode" for it's proprietary GPU instruction set when you initialize the OS graphics driver.
For AMD GPUs the situation is more or less the same, except that without said "binary blob" the GPU isn't on-purpose throttled down near as much.
Or are you implying that we need RISC-V success as a GPU ISA too?
The now open sourced nvidia kernel modules should do something similar I guess: loading "bug fixed" firmware images.
The "near-zero" drivers means the default firmware does provide already the hardware programing interfaces at power on. On such complex hardware, expect bugs in this default firmware. Currently, we have a driver written in gcc kernel C dialect and for linux, not ideal.
I spotted a RISC-V GPU the other day. I guess I wish for CPU/GPU ISAs without toxic PI tied to them (like x86/arm) to succeed. I dunno if AMD GPU isa has any PI tied to them though a la arm though. Rumors: AMD may be interested in RISC-V ISAs for its GPUs and CPUs.
Some (most?) programs expect a high level OpenGL GPU API, instead of dealing with Vulkan/bare-metal directly. Converting some very high level OpenGL calls to actual API is part of what is expected from the driver. To implement this, you would most likely require a high performance, high IPC CPU embedded in the GPU - a waste since you already have one in the system.
> The now open sourced nvidia kernel modules should do something similar I guess
Those open sourced nvidia kernel modules does this - it is "near-zero" as you describe - they just moved almost everything important to the proprietary binary blob loaded to the GPU.
> Rumors: AMD may be interested in RISC-V ISAs
Everyone is interested in RISC-V, not necessarily in user-visible RISC-V ISAs.
If true for nvidia, it means their kernel driver is almost empty, some firmware loading, and only memory mappings around for the ring buffers (dunno if nvidia has virtual memory spaces). Without the compute/3D pipeline programing from userspace, the lapsus hackers will feel kind of even more ripped off, since the kernel modules are somewhat basic.
Ofc, when I was talking about RISC-V ISAs, I was actually talking about user visible ISAs.
But if I'm to predict the future - they'll fail as their biggest issue now is that over past 10-15 years they "learned" well how to be "greedy" and are looking for short term maximized profits.