This is a fantastic program for teaching students about VHDL. You can make some really cool stuff on a 130nm process with 10mm^2 available. Like a full toy SoC. Really cool.
I've been thinking that with supply chains breaking down, there's possibly a market opportunity for semiconductors to move back to older, cheaper process nodes that are easier to build a fab for, ensure there's a robust supply, and recover some of the recent performance improvements through less-bloated software. Chips were "good enough" back around 2001, when the 130nm process was introduced. In a world where you can't count on robust transportation & commerce and global (or even national) markets may fragment, it may make sense to be able to assure chip supply locally, even at the expense of absolute performance (which is less important when you can't be sure there's a single winner-take-all market). Would this program be a step toward that world?
In 1990, Cypress Semiconductor acquired a Control Data fab, which became Cypress Fab 4. At some point they developed a 130nm process. In 2017, cypress sold the fab to skywater, which was formed specifically to operate this fab. Skywater, google, and efabless collaborated to publish the PDK for the 130nm process.
“Old” processes like this have lots of uses, even before the recent supply chain issues (which were/are often worse for mature processes than more leading edge stuff). They are commonly used in automotive / embedded stuff, and the US government / military require US-based semiconductor fabrication for some contracts.
Real chips would certainly provide more room, possibilities and performance - but would also take away from the fast turnaround time that FPGAs provide. And given this run only seems to give people a single shot to get the design right - you want to verify it on a FPGA upfront anyway.
[1] https://www.digikey.co.uk/en/blog/whatever-happened-to-progr...