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Comment by natly | Hacker News Reader

It'll be exciting if the clock cycles keep stalling like they've basically been doing in the last few years and we end up having to learn and do things at this level again to squeeze out what we want happen out of a long-term fixed compute budget.

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The literal clock speed of CPUs has been stalling, but CPU performance is and has been on a massive increasing trend effectively ever since AMD released the first Ryzen CPUs.

Recent product announcements from Intel and AMD show no sign of slowing down. Sure it's not the 'double performance in 1-2 generations' of the olden days, but it's definitely not stalled either.

The improvements outside the processor matter more for a typical user. DDR5, PCIe5, USB4, Bluetooth 5.2, WiFi 6E, etc. These recent version bumps make everything feel faster, but the CPU gains are indeed coming much slower and at vastly higher cost. Die shrinks will likely reach their physical limit this decade for traditional silicon.

Even account for security vuln mitigations? As an aside, is there a good table somewhere listing all of the Meltdown/Spectre etc. vulns and current status regarding software and hardware fixes? My understanding is most still don't have hardware fixes yet.

One of the reasons why CPUs are getting faster is because the more transistors you have, the faster is the chip and vice versa (this is not a proven statement but rather my intuition). We might not be able to use higher clock frequency, but we still can fit more transistors on the same area.

What’s even more, is we can make higher frequency chips, it just turned out higher density gates was the easier path to go down.

If the gates path reaches its end, we can still go back to clock. It won’t be easy or cheap to solve all the clock problems, but if it’s better than the alternative someone will do it (like how fracking only became viable as a means of drilling oil once the cheap, easy to get oil was somewhat depleted)

By the way, why did clock frequency stop around 3-4 GHz? I assume that as transistors become smaller, their propagation delay decreases, as their power consumption, and it allows to use higher clock frequencies. Is there something else that I am missing?

Propagation delay doesn't decrease from one end of the chip to the other if you keep the same area in total.

Power consumption and the resulting heat.

The top-of-the-line next generation of chips will be solidly clocked at 5GHz and above.

https://hothardware.com/news/amd-computex-taipei-2022-keynot...

I believe mainframes have had CPUs operating around this for a while as well.

The Ryzen 7 2700X chip I bought back in 2018 is still fairly close to the latest Ryzen 9 chips in terms of single-core performance on benchmarks (within 10% IIRC). The Ryzen 7 is an 8-core (16 thread) CPU, and now you can get 12 or 16 core Ryzen 9's, but most workloads don't take proper advantage of even an 8-core machine.

Quick online research shows a 30%-40% single core improvement from the 2700X to the 5700X, and a 40% to 50% (single core) improvement to the 5900X. Maybe you have a specific weird workload that isn't improved much, but performance improvement for the average workload is much better than 10%.

This is only in benchmarks.

Most workloads don't even take proper advantage of more than 1 core. Single core performance is still the most important metric and there hasn't been anything exciting regarding that in the last... 15 years?

This is true. However your workload runs in a multitasking OS which, at least for Win 10, needs at least a core only for itself.

This is part of why Intel acquired Altera. On the other end of the spectrum, some of the latest AVR families have configurable glue logic akin to a tiny PLD.

PLDesque glue logic is cool, but the coolest thing I've seen is uC's with fully programmable pins, so eg the DAC device inside the chip can be connected to any of the external pins, making board layout dramatically simpler.

I'm guessing you've seen the Infineon (formally Cypress) PSoC [0] stuff too? Both analogue and digital peripherals that can be configured mostly arbitrarily.

There are also some neat mixed-signal parts from Dialog [1] - no MCU but interesting analogue and digital blocks all the same.

[0] - https://www.infineon.com/cms/en/product/microcontroller/32-b...

[1] - https://www.dialog-semiconductor.com/products/greenpak

The analog configurability of PSoCs is perhaps a little less flexible than you might be led to believe. There's a small number of analog components which can be linked to pins or to each other through a limited number of non-uniform interconnects. It's certainly useful, don't get me wrong, but I'd hesitate to call it arbitrarily configurable.

In the same vein, the Raspberry Pi RP2040 has what they call Programmable IO modules which are tiny cores that can run small state machines doing whatever you want, separate from the main ARM cores.

Yeah, doing my thesis with it right now, but not sure if it's worth looking into. For one I'd have to brush up on ASM, while the two-core Pico lets me meet my requirements as-is anyway.

Pretty cool though, you can write VGA drivers with it apparently!

Good time to pivot towards embedded and systems level programming

Probably a decade or two premature but can't hurt to hedge the bets (there's definitely opportunity to make software that makes fpga and asic compilation from higher level languages easier though - only reason it's not happening is the high talent required and low amount of people at that intersection, there's no way verilog/vhdl is the global minima).

I'm going to sound like one of those fanboys but Rust really is a breath of fresh air. Lots of people now are starting to make actually fast and performant applications due to the ergonomics of the language being more high level than something like C or C++. It's actually my favorite ML type language, I've use OCaml to a large extent before but with Rust, the DX is still pretty nice, even if you have to contend with the borrow checker.

How is rust higher level than C++?

It has powerful memory safety features, but that's not what I'd call "high level".

The level of a language depends on what idiomatic code looks like. Idiomatic C is lower level than idiomatic C++ which is lower level than idiomatic Rust. Just because you can write things at a lower level doesn't mean that people do so, or even are allowed to do so. Most places where you write C++ you aren't allowed to write it like C, and similarly most places where you write Rust doesn't allow you to write large unsafe blocks.

Pattern matching is arguably one higher level feature/capability.

Indeed, my impression has been that C++ is as high-level as you want it to be.

My impression of C++ is that you have to write multiple constructors before you can implement any logic.

That's ... not even wrong. Or severely misguided. It's like saying "My impression of cooking is that you have to make several hotdogs before you can start frying things."

I think D will be much better suited for embedded system because you can even seamlessly import C functions into D program [1],[2]. Since C is the de facto language for embedded system this new capability is a game changer.

Added to the fact that D language designers try to make programming D similar to programming Python and D is by default has GC, it'll make it easier for those coming from application software developer background to program embedded system with D.

[1]Add ability to import modules to ImportC:

https://dlang.org/changelog/2.099.0.html#__import

[2]Great Programming with ImportC:

https://youtu.be/c3kJoFCzA-0

Doing things at this level is what FPGAs are used for. Processing many GiB per second of samples through complex chains of signal processing logic, for example.

Even with modern technology (I guess) we have to use lots of tricks to get desired performance. So (I guess) the level of skills that was necessary to create the Pong, would help designing modern chips as well.

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