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Comment by q-big | Hacker News Reader

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TopoR, an EDA program developed and maintained by the Russian company Eremex:

"The most recognizable feature of TopoR is the absence of preferred routing directions, which results in unusual looking PCBs."

> https://www.eremex.com/products/topor/

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> which results in unusual looking PCBs

I really love things like this that break the non-technical cargo-cultish norms in a technical field. There's no electrical reason to wiggle wires around at 45 degrees, but you're looked down upon and made to feel bad if you don't. Technically, it just add parasitics.

One could claim "it's pride/art", well why constrain yourself to 45 degree lines if you're making art!?

I think one of the hidden benefits of 45 degree bends is implicit organization.

I have zero experience with boards like what this TopoR router can create, but the sample images are chaos to my eyes and difficult to follow. That could just be what I'm used to seeing, however... but it looks like paint flung onto a canvas vs. highway lanes to me.

Ah yes. The Pollock Router.

Electrons (or should I say holes) dont care. On the other hand less sharp angles means less danger of over-etching. https://www.protoexpress.com/blog/dfm-issues-pcb-manufacturi...

There used to be a technical reason for 45 degree angles: as an upgrade to engineers drawing traces on big blown up transparencies to be shrunk and applied with photochemical processes... the first computer circuit CAD programs weren't able to handle more than traces with the 8 45 degree angles around a circle.

That got to be the style and (almost) nobody changed since then.

> There's no electrical reason to wiggle wires around at 45 degrees,

No, but there can be various kinds of over-etch issues in corners that sharp corners make worse.

> Technically, it just add parasitics.

Depends. 2 45 degree bends is a better approximation of a smooth arc than a 90 degree sharp corner.

Yes, arcs are even better electrically and better for physical manufacturing. But they are annoying to nudge around. Note that the author of this article suggests saving the "melting" for the very end of the process, because making things all smooth and melty makes it harder to edit the board. It's a bit niche. And as a result, the software at both board fabs and for engineers deals a bit worse from CAD standpoint. And in turn, even worse from a designer point of view.

I spend a bit of time trying to minimize angles (e.g. if I can make a 30 degree turn further away going to a pad instead of a 45 degree one, that's nice-- straighter routing), spreading traces more, and teardropping.

It depends on frequency, transmission line with, and bend radius. A properly mitered bend will have less parasitical and radiation than a curved bend. Due to internal inductance, the currents flow at the edges of a trace, thus when you have a curved bend, the currents in the outer radius fall out of phase with the inner. Thus is why you don’t see a lot of curved bends in microwave PCB, rather mitered bends.

I am a little disappointed to see this comment so far down. Not sure how anyone can dismiss all those concerns as "only" parasitics.

I didn't dismiss all of those concerns. In the high microwave/mm wave RF case, where this would happen, you also wouldn't wiggle around at 45 degree angles either, to match up with some pretty grid, you would have as straight of a shot as possible, or a large radius arc. RF circuits rarely follow aesthetically driven norms, and already have unusual looking PCBs, because the geometry of the trace eventually becomes the component.

For EM analysis, it actually helps to be “on grid” as the gridded solvers have a lot more dynamic range than gridless, like 100 dB more. Analyzing structures such as filters require high dynamic range, so adding a bunch of curved artwork will introduce errors in the simulation, or take much more resources. I do all my PCB layouts on a 0.1 mm grid and try to keep things snapped. I’ll even round footprints to the nearest 25 um or larger.

Also, the GDSII format for IC does not handle curves well. Unlike DXF, it can’t handle a circle, so has to decimate it into a polygon.

When doing signal integrity analysis on PCB, the tools can break those long runs of straight, parallel lines into closed form models (i.e. coupled transmission lines) which greatly speeds up the analysis. With a bunch of curves, you can’t do that, and it has to break those out for EM analysis.

If one could easily make square via holes in PCB, those would be preferable for situations like grounding vias as they better terminate the EM wave.

@dang, madengr's insightful comment (sibling of this) seems to have been unfairly murdered? He's absolutely right.

There's a technical reason to use something with no technical reason precisely because it's engineering. Your job is to make a circuit board that works, a trace that has the right impedance, etc. so doing the dumb thing reduces your risk of not doing that. More of a principle than a practical issue in this case, of course.

Yeah because it’s so easy to verify creepage and clearance requirements with a bunch of squiggly lines all over the board… Add to that thermal properties and temp rise calculations. There’s a heck of a lot more to PCB design than just an “electrical reason”.

Are you being sarcastic? I can't imagine why squiggly lines would make it harder for a computer to check clearance. They can definitely already handle it. They even showed examples in this post!

Similarly I don't see why thermal calculations would require a particular geometry. That would be a very strange way to do things.

> Similarly I don't see why thermal calculations would require a particular geometry

I imagine a curve could have more error, or require more time, with an FTDT simulation, compared to something grid like.

I thought about how lazy I am and how difficult and a pain in the ass it is to design a schematic, how annoying it is to pick components and make sure they are properly rated. Routing is almost trivial except for some of the tricky high frequency and analog stuff.

I would prefer some sort of "Smart EDA" that automatically understands that I want to place a switch mode power supply with X constraints here, then automatically rates resistors, capacitors, inductors, mosfets, etc and automatically picks manufactured components from mouser. I could get behind that. If the software does that part I will gladly do component placement and routing myself!

We are working on exactly that at https://flux.ai

Does the company have any in-house guidance on the application domain? Or is it all external feedback so far?

Both in-house and external

Almost everybody here has worked in hardware before. Bunch of people from Apple, Siemens, NASA, and other places

For switch mode PSUs (which are usualy the biggest pain to design), TI has a switch mode design tool (WEBENCH) that is mostly what you are describing (you specify your constraints and it gives you a selection of designs, usually cheapest, most efficient, and smallest). It'll even let you download a CAD file with the schematic and layout, though I'm not sure if using it is completely seamless. Of course, it'll only suggest TI parts...

mitxela discusses topor in the video. i used topoR in the past. it has does have import-export options from many EDAs, here its imported from eagle. here is a gif of it at work. http://i.imgur.com/66S5KMv.gif

TopoR is excellent... And the only auto router I found to actually work. I use it along with Diptrace (which is also Russian developed).

I wonder how it works? I imagine some sort of hill-climbing search method, simulated annealing perhaps?

I don't know how TopoR implements this, but the linked Wikipedia article contains a reference to a PhD thesis on this topic:

> https://web.archive.org/web/20170718184145/https://pdfs.sema...

I was thinking wave function collapse. An SMT solver should be capable as well.

Can you elaborate/rephrase, please? Sounds interesting, but I also didn't understand. :)

I think wave collapse could work with a PCB that already has the components placed on it. So only routing remains. Essentially you divide the PCB up into small discrete chunks and either fill that with copper or not. You start at every component pin and fill in the copper. Then you pick edges of where copper is filled in and either fill in or not. Repeat this process and backtrack when you violate a electrical rule. Either this process finishes with a valid routing or won't find a route.

With an SMT solver you could specify similar constraints.

Whatever it is, you’ll be seeing it in a FAANG interview soon

“Topor” also means axe/hatchet in Russian

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