How is that a relevant comment in a discussion about ASIC design?
I hope you don't have the idea that chip routing is done manually.
I hope you don't have the idea that chip routing is done manually.
PCBs "look good" because of different production contraints (and I guess because you're mostly connecting tight-timed busses together)
In ICs you're doing the above but also pulling signals from 10 different places together.
On a basketball court create a pile of metal plates with bar codes and hooks, each one represents a gate, robot uses rubber bands of sizes vaguely representing timing budget from synthesis to hook the gates together. Robot picks up the whole thing using rubber bands representing the external ports and gives the whole thing a few shakes. Puts it all back down, goes over each metal plate and reads the bar code and resting position - that's your initial routing guess - anneal from there
Interestingly, placement is much harder than routing from a complexity theory point of view (specifically, there are fairly strong inapproximability results for placement-style problems).
I worked on MCU layout around 2011, and only the digital logic was autorouted/placed.