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That interconnect was 3 or 4 orders of magnitude faster than Ethernet at the time for things like barrier synchronization and the hardware was fairly simple. [1]

http://aggregate.org/AFN/ has more, including hardware designs.

[1] http://aggregate.org/TechPub/spdp96a.pdf

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Very cool. It all started because we had a bunch of gateway PCs that had parallel ports and we wanted something to synchronized across them. It was fun trying out different parallel cards made with different 374 latches. We even made a few custom ISA cards to play around with other ideas. Hard to believe it has been 30 years since I was at Purdue!

Good links there. At a slightly higher level, I've sometimes wondered whether RTOSs and OS schedulers could make use of special-function hardware registers for keeping track of priority logic, etc.

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