Comment by mschuster91 | Hacker News Reader

Comment by mschuster91 | Hacker News Reader

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The problem won't be legal, but scale: the Pentium 3 has ~9.5M transistors [1] - and the world's largest FPGA, at a staggering price point of 55.000 dollars, has only 9M logic gates [2].

Probably you could use an FPGA a bit smaller if you use FPGA-native memory for L1-L3 instead of transistors, but you'll nevertheless need an FPGA that is many orders of magnitude too expensive for a hobbyist niche project. Also, you would need serious quality photographs of the die... which can be done for old and small chips on a budget, but will be really expensive even for something of the Pentium 3 era.

What has always interested me though: how are CPUs and modern GPUs actually developed, given that FPGAs are way, way too small and silicon-making runs extremely expensive?

[1] https://www.computerhistory.org/revolution/story/330

[2] https://hackaday.com/2019/09/24/who-could-possibly-need-an-f...

The most powerful x86 CPU emulated under an FPGA it's a high end 486 with ao486.

Far from a Pentium MMX.

Logic Gate != Transistor and FPGA LUT != Logic Gate

FPGA LUTs are quite sophisticated, the LUTs in both Xilinx and Intel's latest offerings are able to implement an arbitrary boolean logic function with up to 6 inputs and 1 output. The FPGA also comes packed with other specialized hardware such as on chip memory and multipliers so you do not need to burn logic to use those things. You very likely could fit a Pentium III on a moderately large FPGA.

The real challenge would be matching the clock speed of the original processor. Even 400MHz of the first pentium IIIs on the market might be difficult, getting near 1GHz is likely impossible.

I'd love to know who uses a 9M LUT FPGA! The article mentions companies like Arm testing their designs, but do they really test on FPGAs? (And would such a test be useful? ASICs and FPGAs have fairly different timing because of the length of wires).

how are CPUs and modern GPUs actually developed

At least some of it is done on FPGA clusters, boards with multiple enormous FPGAs. Cost of such a system is in at least 6-7 digit range.

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