What matters is that stuff is binary compatible between RISC-V implementations.

That means there shouldn't be two different groups of people implementing the same instruction differently. Any unimplemented instruction must either be trappable (so that it can be emulated on software) or have a feature flag (so that compilers can produce a separate bit of code for CPU's without support).

If I were RISC-V, I would push hard for any binary made for any RISC-V machine must run correctly on any other. But performance doesn't matter.

I'd also require anyone implementing hardware extensions also release software and pseudocode of what each extension does, so that all other people without the extension can emulate it.

Sadly that's far from true today.