Simple electrical circuit learns on its own–with no help from a computer | Hacker News Reader

Simple electrical circuit learns on its own–with no help from a computer

science.org

130 pointsrbanffy45 comments

I actually work on this project! Feel free to ask any questions.

Also, here’s an arxiv link to one of the papers if anyone is interested: https://arxiv.org/abs/2108.00275

Quite fascinating paper. How did you come up with this twin architecture? Can this effect be simulated in software?

Thank you! Definitely a group effort. Two big things that contributed to the choice: We knew we didn’t want the system to have to store memory on each edge so that eliminated a lot of our options. In our experimental learning rule we only had to compare voltages which is actually easier to do if we have two simultaneous networks.

Interesting, I haven't seen this twin approach anywhere in ANNs. (I know about Barlow twins and Siamese nets, but this is different.)

How did you decide on the topology of the network/graph?

Since we have no global processor, each edge is changing using only local information, a lot of stuff that makes sense in our network doesn't really make sense in ANNs and vice versa. For example, in our newest paper (https://arxiv.org/abs/2201.04626) we desynchronize the updates of our edges. Instead of changing the entire system all at once, we change random parts of it each training step. This doesn't really make sense to do in an ANN where you require global information for every edge update.

The shape of the network is actually inspired by jamming solids (we're a soft matter lab), but is completely arbitrary. We've done a ton of different shapes and sizes in simulation.

What type of component is an "adjustable resistor"? Looking the term up online only shows potentiometers, which I really don't think is what is being described here. Is this some sort of memristor?

It is in fact just a digital potentiometer. In the experiment shown in the paper I linked we’re using a 128 position one. In new work we’ve actually shifted to using transistors which are better for a number of reasons (smaller, faster, nonlinear, continuous).

The Mark I perceptron used physical (analog) potentiometers that could rotate themselves.

Fascinating! You can get digital pots in lots of different configurations.

https://www.digikey.com/en/products/detail/microchip-technol...

https://en.wikipedia.org/wiki/Perceptron

https://americanhistory.si.edu/collections/search/object/nma...

I picked up a couple banks of memristors to replace the pots in your circuit :)

Hope to create a small feedback circuit across each memristor, essentially letting it 'train itself'

Sweet! The basic learning comparison (Vc-Vf) can be implemented in tons of physical systems (memristors, springs, water pipes). So seeing it in other mediums would be pretty cool.

> I picked up a couple banks of memristors

Are those now something just available off the shelf?

https://knowm.com/

thanks

On mobile so didn't have time skim the paper: is it a lienar layer trained with basically hebbian learning? If not, how do you handle backpropagation/credit assignment? How would you scale this to 100 million parameters if you had to?

This is strictly not a neural network, so there is no backpropagation. Credit assignment is done on each edge using a local rule (Eg. using only its current state and the state of touching edges). To scale the network you just have to add more edges (no limit on the amount). We have a design for a tiny version of this network using transistors that could have order 10^6 edges on the size of a microchip.

I've looked over the paper now, unless I'm misunderstanding this seems very similar to the general trend of hebbian learning/STDP/local predictive coding/teacher forcing (for those unfamiliar, these are all distinct but the basic idea is always to have a signal adjust based on the difference with some local target. Hebbian learning is the basic "fire together wire together" principle, STDP is a specific instantiation that works with specific types of memristors, teacher forcing comes from RNN training and imposes the ground truth input on intermediate step, local predictive coding I can't recall the precise thing but but basically diffuses a local output error through a network similar to what is done on a single layer here [which can actually approximate backpropagation! It's very cool]). How would you differentiate yourself against this/what would you say is the core benefit of this approach?

OK, I looked over your paper. Could I actually build this from your paper and your single edge node circuit? I am not sure yet, I did not read it three times yet (typically, have to read it multiple times)... but my first impression is that I could not reproduce the papers conclusions. I _feel_ like something is missing. Are you holding off until your provisional patent is approved, or the like? I feel like there is some connecting device/circuitry/something left out...

As you mentioned near the end, you do NOT overcome the bias in the AD5220s? You just accept the error floor??

We’re not holding anything back, you should be able to recreate our findings from the paper. More broadly, there are a number of ways to recreate the network using the relatively simple learning rule we provide.

In theory, this learning rule will continue to decrease your error forever (in our simulations our error goes down to machine precision). However, with any physical learning network you’re always gonna hit an error floor based on the precision of your components. With our current variable resistors and network size that floor is around 10^-3. With more precise components (like we mention at the end of the paper), that floor will go down significantly.

>> To train the system with a minimal amount of computing and memory, the researchers actually built two identical networks on top of each other. In the “clamped” network, they fed in the input voltages and fixed the output voltage to the value they wanted. In the “free” network, they fixed just the input voltage and then let all the other voltages float to whatever value they would, which generally gave the wrong voltage at the output.

>> The system then adjusted resistances in the two networks according to a simple rule that depended on whether the voltage difference across a resistor in the clamped network was bigger or smaller than the voltage difference across the corresponding resistor in the free network. After several iterations, those adjustments brought all voltages at all the nodes in the two networks into agreement and trained both networks to give the right output for a given input.

How is this not just a perceptron? I'm also curious about the rule for adjusting resistances in both networks.

It is a perceptron, just implemented in actual hardware. The Veritasium YT channel recently did a piece on analogue computers [0]. I didn't find his explanation too compelling, but it is still a good video.

[0] - https://www.veritasium.com/videos/2021/12/21/the-most-powerf...

Ana does a better job I think of explaining some of the finer details, and some specific implementations[1].

1. https://youtu.be/67LXWocO9HI

It sounds specifically like a linear adaptive filter.

Can you elaborate? Is there a windowing function at all?

I believe they are arguing semantics. I would definitely consider two networks moving bits back and forth “computation”

They essentially made a simple analog computer. Veritasium just did a video about the future of such computers: https://youtu.be/GVsUOuSjvcg

>> We withhold 120 of the 150 flowers as a test set, and train on 30 flowers, 10 from each species. We designate 5 input nodes (one for each measurement plus one fixed ground) and three output nodes (Fig. 3D inset). Between training steps, the entire test set of 120 flowers is run through the network, and a flower is considered correctly classified if its three out- puts are closest (L2 norm) to the desired outputs of the correct species.

I know this is the done thing in machine learning and I don't hold it against the authors, I just hold it up as an example of the broken training regime that is the golden standard throughout machine learning: a test set is said to be "held out" only because it is not used to directly adjust the parameters of a model. In truth, it is not held out, because it is used to control when training has achieved its goal and the inner loop can stop adjusting the model's parameters.

In the paper, the device is nominally trained on "30 flowers" but in practice "the entire test set of 120 flowers is run through the network" between training steps. In other words, there is an "inner" learning loop performed on the "30 flowers" but this inner loop is dominated by an outer loop on another 120 flowers. At the end of each inner-outer loop pair, the system has seen all the data. Training ends only once the performance on the 120 flowers has stopped changing. Then it's asked to classify the 120 flowers again. What a surprise, it performs very well. But we have learned nothing of its ability to classify _truly_ unseen data that was not used in either its inner or outer training loop.

So from that point of view, I'm sorry to say (and with apologies to the authors who are probably monitoring this thread) but nothing new has been done. The same old bad practices have been encoded in hardware.

I agree this is not how you should evaluate. But it is not how things are done in (correctly executed) ML. What is described is a validation set, not a test set. The test set should not be involved in training or(hyper)parameter optimization at any time.

You are right of course that it shouldn't, but in practice it always is.

The pragmatic reason for that is that if a team spends a month and a few thousand dollars developing and tuning a system, and then they find that the first time they test it on their held-out test set it doesn't work, there is no way that they'll just drop it and accept that all their effort and funds got to waste. They'll just keep trying until their system retruns the best results on the test set. At which point they've overfitted their system to the test set.

It's rare that this is described as clearly as in the paper I quote from but I think that's because the authors of the paper are not machine learnig people. In most machine learning papers you really have to squint between the lines to be sure what's been done.

Edit: btw, this is the paper I quoted from, linked by the author upthread:

https://arxiv.org/abs/2108.00275

I should have posted my comment under theirs but I got distracted and posted it on top instead.

I'm a little confused about this title: the circuit _is_ the computer. It gets help from literally being the computer necessary to update itself.

Link to arXiv: https://arxiv.org/abs/2108.00275

Seems like continuous-time gradient descent on something approximating a ReLU network would not be too terribly difficult to implement in analog hardware. Instead of summing gradients over a minibatch we could do pure SGD with only one sample at a time, using a latch to hold the sample constant while loading another one from storage. Has this been done?

Isn't that the Mark I perceptron? https://en.wikipedia.org/wiki/Perceptron with some exceptions (it's single-layer, and the entire dataset is a single batch input).

Except it is a computer, an analogue one.

By definition anything that computes is a computer, so yeah. :)

In fact, before the term was applied to machines, it was a job title.

"learns on its own" makes it sound like unsupervised learning, but it's labeled data: the researchers also input the correct "output voltage" which they want the system to learn.

it's still neat tho. I feel that an AGI will come out of an analog computer rather than a digital one.

I feel like AGI will be an emergent property of a network of computers rather than an individual analog-or-digital one.

This reminds me of the circuit used by some folks to match transistors at home. In this case, it utilizes a form of wheatstone bridge with a potentiometer to deal with non-matching resistors to level out the test rig (source of the circuit in question: https://www.youtube.com/watch?v=t--0fCMzfIo ).

“If it’s made out of electrical components then you should be able to scale it down to a microchip,” he says. “I think that’s where they’re going with this.”

Mind.Blown. This could be a very interesting development.

Which would be best for this - ASIC,FPGA,VLSI? Something else? for a rapid prototype setup?

search 'memristor neural network'

None. This is an analog computer. There are devices such as the field programmable analog array (FPAA) however that may be suitable.

https://www.anadigm.com/fpaa.asp

https://anabrid.com/ is working on programmable analog computer on a chip though. So far they are only selling discrete hybrid calculators and an educational "cheap" analog computer. https://the-analog-thing.org/wiki/Main_Page

Those FPAA seem just to be programmable analog filters not analog (or hybrid) computers.

Actually you can do a lot of computation with filters but you’re completely incorrect about what a FPAA is.

The FPAA is a matrix of switched capacitors. Such a matrix can be used to design an analog computer. There’s a pretty huge body of literature on this subject.

I’d bet that the OP could have implemented this using FPAA.

Randomly picked a paper https://ieeexplore.ieee.org/document/7027875

You are correct. However I don't see anything on implementing exponentials or logarithms of signals thus i am confused how one would implement the product of time time continuous signals. I saw an screenshot in anadimgs software which suggested that a small number of such multipliers can be modelled but I am unsure how. If you have some explanation where inside the block diagram these analog multipliers would be implemented that would be helpful.

Anadigm is a bit shy about numbers one would care about as analog programmer. How many multipliers with constants, summers, multipliers of two signals and integrators are available on the chip? Resource on that would be welcome.

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