Using a tiny HC32L110 ARM chip | Hacker News Reader

Using a tiny HC32L110 ARM chip

spritesmods.com

133 pointsrcarmo74 comments

I've always been impressed by sprite's work. A good example of their skill is contained:

"Now obviously, the fact that this gives us only 12 of the 16 pads is a bit of a shame. The only way to get those extra pads is to use an extra-expensive PCB manufacturing process that uses either microvias or can route tracks between the pads... or you could cheap out and do something crazy like dead-bugging the chip."

Picture: https://meuk.spritesserver.nl/foto/gallery/image/3939/IMG_35...

If the four center pads are GPIOs, then you can put a single 0.45mm via (0.2mm drill) in the middle of them and tie them together. That gives you one extra pad at least. I’ve done this before with JLCPCB’s regular process.

Getting some elm-chan vibes http://elm-chan.org/docs/wire/wiring_e.html

That's very nice dead-bug work. I'm surprised he didn't stake the wires or encapsulate the whole thing in glue, but since he brought everything out to tiny LEDs placed between pads, maybe staking was neither necessary nor convenient.

> Well... that's not necessarily true. For instance, even the cheapest 2-layer process that JLCPCB offers is capable of 0.127mm tracks spaced 0.127mm apart... which means you can lay down tracks at a minimum of 0.254mm apart. That's good enough to connect to pads with a 0.35mm pitch.

The fence post error of PCBs, you need 4x the minimum spacing / trace width to breakout without vias. 1x trace, two spaces, and half a trace on both sides to match your BGA pitch. Best you can do on JLC is a 2 row 0.5mm breakout without resorting to tricks. You really need 0.1mm capability for these tiny pitches.

Edit: Just double checked JLC, their 4 layer does offer full 0.09mm capability, which is new! It use to only be the outer layers that could be 0.09mm, and 0.127 on inner layers. You can actually do a proper 0.8mm BGA breakout now, and 1mm pitch is child’s play now, you can fit two traces between vias.

Can you elaborate that? For each BGA ball, I need one trace width of trace, plus one spacing width to the next trace, right? There's a space on the other side as well, but that's already 'provided' by the trace above.

Or do you mean if you want to connect to both the outer as well as the inner layer of balls? Then you'd be right I think, but that was not what I meant; I only calculated the spacing to connect to the outer layer and nothing more.

The best reference I can point to is the Xilinx bga pdf in google. Basically, for given capability (geometry really) there are only certain ways of breaking out pads. You can either fit multiple (luxury of process), one, or zero traces between vias and pads. And as a result of this, you need xTimes PCB layers to effectively breakout BGAs given there ball depth.

Simple chip scale bgas can be broken out one layer, but the geometry requires capabilities that only multi layer process provides.

The real takeaway is JLCPCB just got a whole lot more competitive with there 6 layer service. 0.2/0.4 vias, 0.1 trace/space is the holy grail. Anything smaller geometry than that you need board house support, and a finely tuned assembly process.

Nice, thank you for the notice about the inner layers.

They don't make a big deal about it when they improve the capabilities: in the past they've also improved minimum via ring diameter from 0.45mm to 0.4mm, which doesn't sound like much but it allows you to fit the vias in between 0.8mm pads on inner layers.

Patiently waiting for the day microvias become too cheap to meter.

I wish they advertised it more! That reduction in annular pad plus the inner player geometry is a game changer. Effectively any 0.8mm pitch bga is completely prototype-able now.

I did a 0.8mm fanout on their older limits, and it was barely doable - the inner balls of the ECP5 FPGAs are all power and ground, and with careful depopulating of the inner layers' annular rings it's possible to get enough working room to make it all fit!

But if you want signals in those inner balls... still pretty tight. And the 15x15 ECP5 is the absolute max this would work for; after that you hit both needing inner layers to route on, and additional ground planes for the outer layers' return current.

I tried laying out a tiny little USB switch on a JLCPCB board with .154mm traces and got about 50% mortality. Could be partly that I'm not good at PCB design but clearly there's a _lot_ of margin you need to leave.

Let me translate for USA (1 inch = 1000 mils)

0.127mm = 5 mils. Note that is it impossible to achieve +/- 0.001 mm tolerance in PCB manufacture, so including 3 digits' precision is - not helpful.

0.254 mm = 10 mils

.35mm pitch = 13.78 mils (why not 14? Because on packages, with lots of pads, you'll get errors if you don't account for small fractions)

0.09mm = 3.5 mils

1 mm = 39.37 mils

PCB manufacture traditionally has been done in mils, with good reason: you can use no decimal-point representations of most of the useful quantities in PCB layout.

And, don't you love 100 mil, 50 mil, 2 mm, and 1 mm connectors ? Not to mention 156 mil and https://www.samtec.com/connectors/high-speed-board-to-board/... which has 0.8 mm pitch. I soooo love connectors, if I were a Connector Manufacturer.

Looks interesting, although I am not sure if it is worth the trouble for hobbyist who can buy similar SOCs in much more friendly packages.

A commenter compalined about his "negative and accusatory language". Where does he see that?

I think it's phrases like "some shady Chinese-language Windows-program". There are hints of a certain kind of English language chauvinism throughout the article. It's not surprising that a Chinese product aimed at the Chinese market is documented in Chinese. This doesn't make it obscure or shady.

As an imaginative exercise, try replacing 'Chinese' with English/American and see how the article reads.

I personally read it as less of an English-supremacist stance, more of a general distrust of Chinese institutions.

Still seems unfair - surely you shouldn't consider every Chinese company and person an extention of CCP?

If one called this program glitchy, sloppily, poorly written, or incomprehensible, we could discuss it in it's merit, and perhaps compare it against it's equivalents.

Shady implies criminality, it installs spyware and steals your bitcoins - and thats quite unlikely given how limited the audience of such a tool would be.

Every Chinese company is an extention of the CCP, read about China's "National Intelligence Law" it goes a lot further than the patriot act.

In reality it doesn't. In US the agencies can "convince" any company to do absolutely anything, starting from installing backdoors.

I took it as being representative of the experience I have had many times getting software from obscure Chinese manufacturers: a “dev environment” that includes pirated software, up to and including the occasional pirated windows XP installer lol.

I knew exactly what he was talking about- not xenophobia, but legitimately shady software that is common to get from Chinese manufacturers, often from some equally dodgy ftp server or torrent seed.

> I knew exactly what he was talking about- not xenophobia, but legitimately shady software that is common to get from Chinese manufacturers, often from some equally dodgy ftp server or torrent seed.

This so much. Part of the reason we decided against using one microcontroller that was China-only was that their "support" included a pirated and cracked version of Keil.

Uh, no.

As someone who doesn't speak Chinese, I can actually deal with Chinese datasheets, surprisingly (diagrams and hexadecimal generally don't need translation). Chinese support forums are a bit tougher if I can even get to them from outside China.

However, once you start exhibiting some level of casual illegality, that's a full stop.

Hopefully, RISC-V will side step a lot of this in the future by standardizing the toolset on something open-source.

English is a world language, at least when it comes to engineering. I don't understand why chinese people prefer to write chinese documentation. Surely they can read and write English. I'm from Kazakhstan and when it comes to comments or other technical docs, I prefer to use English, it's just lingua franca of IT.

Remember that China is the electronics manufacturing hub of the world. A lot of Chinese component manufacturers don't care that much if people outside China can use their products, because by far their biggest market is within China. Chinese companies aren't going to take the time to translate their datasheets just so a few hobbyists can play around with their chips. And if a company in the US really wants to use that chip, they'll probably just hire someone who speaks Chinese to read the datasheet. There are plenty of Chinese speakers around.

Not for hardware. Lots of chips are made in China and only sold in China. It's true that Chinese is harder to learn to read than English, especially if you're from Kazakhstan or other Indo-European-language-speaking countries, but lots of hardware manufacturers just aren't concerned about non-Chinese customers.

Chinese is the command line of the 21st century. (I think it was Naomi Wu who said that.)

If you go to Japan you will find something similar.

Well, Jeroen works (or has worked) for Espressif (manufacturer of ESP32/ESP8266), so apparently he knows that stuff well enough to make comments like this.

Personally I'm not going to believe the vague accusation that some unspecified piece of software is 'shady' just because someone works for Espressif. If he has evidence that the software in question is doing something it shouldn't doing, then he should present that evidence. (As another poster has pointed out, it seems massively unlikely on the face of it that an obscure tool for programming an ARM microcontroller would make a good vector for viruses or spyware.) If he doesn't have evidence then he's just casting aspersions on the software because it's Chinese, which comes across as somewhat prejudiced.

None of this is a big deal. It's just not hard to see why the tone of the article could rub people up the wrong way.

By and large, every piece of software that comes from China like this is the same. Barely functional when it comes from a random FTP server in a rarball you got from a link in an email, works best on a pirated copy of Windows XP, and half the time bundles a pirated copy of other people's software itself. You would be extremely foolish to simply look past this and declare that the origin of the software is irrelevant for the sake of dispelling imaginary xenophobia.

I don't want to get into an argument over the truth of that generalisation. However, you can presumably see that it is a generalisation of the sort that might offend people. That's really the only point that's being made here. The post could be edited to make specific criticisms of that one piece of software without unnecessarily antagonising people.

I don't think it is positive to shy away from calling something unsafe because somebody might be offended by it.

The point of my comment really wasn’t “don’t say things that might offend people even if they’re true”. My point was that the article, before it was edited, made vague insinuations that were both uninformative and likely to get people riled up to no purpose. Making specific criticisms rather than sweeping attacks is pretty much the sine qua non of a productive technical discussion. The revised article is both more informative and less potentially offensive. Offending people is sometimes necessary, but usually it’s a sign that you’re not zoning in on exactly what it is that you actually want to say.

The truth is very often offensive and being upset by it is the first step in solving the underlying problem. All of us know exactly what the article means by that phrase and everyone (especially the Chinese) would probably be happier if the Chinese (and US) hardware industry was more professional with its software.

You can say the exact same thing about US-made Windows software.

I have never seen a company based in the US distribute such absolutely terrible software unabashedly, no. I recently looked at the software which came with a laser cutter, which included a cracked copy of a CNC controller software, some random utilities with no confidence inspiring features whatsoever, burned to a CD-R and shoved in the box. That's the sort of level of quality and polish which didn't even strike me as abnormal.

Ever heard about Oracle? Or RSA, which I remember only worked correctly on one particular language version of Windows?

FWIW, I'm more concerned with the fact that it's a Windows program (the closed-source-ness and seeming unavailability of the programming protocol makes it shady, imo) rather than it being Chinese. I'll modify the text a bit to reflect that.

Seeing as he appears to favor FLOSS software (GCC, Make, OpenOCD), the shadiness comment may as well be directed at the Windows-program part.

> Also note that I only used the small trace size to get to the pads, where it's actually necessary: as any trace that is close to the limits of the board houses capabilities has a chance of not being manufactured correctly, I tried using as little trace length that is minimum-width as possible.

I wish we could stop repeating this fallacy. It simply isn’t true. You can specify 100% e-testing if you are that concerned.

I’ve had thousands of prototypes PCBs made, and only two failures I can remember, both were from under etching. Never had a NC on a trace running at specified capability.

You're probably right if you do professional runs. This is the few-bucks mass-production who-cares-its-cheap-as-borscht-anyway process we're talking about; it usually comes with 50% e-testing and I actually have a panelized PCB with traces very close to the minimum come back with a few of the PCBs crossed out. The question then becomes: what about the traces that just made it? Can I run any current through it, will they deteriorate over time? Hence my choice to (advise to) beef up the traces a bit.

If your getting X’s, why bother? Every PCB place I’ve dealt with tells you test rate and success rate (nominal 95% not factoring in specifics of the PCB). For a prototype run, you are effective guaranteed 4.95x good PCB out of 5 Minimum order. 50% e testing means you still got two out of five.

Your “every place” doesn’t fall in the same bin as JLCPCB or PCBWay and similar outfits.

I’ve done tons of PCB prototypes at JLCPCB and all you’ll ever receive is blue box, a plastic bag with the PCBs and sometimes a keychain.

There’s never a test report.

That’s why it $2 for 5 PCB, shipped to you within 48 hours after placing the order.

Very nice, and great that cheap PCB fab can now do small enough lines to reach the individual pads of these chips, at least in the outer ring. Some of them are set up so that the inner pads are grounds anyway, so less important. I wonder if affordable PCB fab will get to the point of being able to do vias under the chip, and traces between pads, as is apparently currently possible with expensive boards. I'm not a hardware guy but this stuff always interests me.

Seems like the solder pad for an interior ball could double as the via to an inner PCB layer? Then you only need traces to the outer balls, at the surface.

It would have to be multiple interior balls since the min via size is larger than the distance between pads. Thus the hope that future cheap board fab can make smaller vias. I also see some parts in 3x3mm QFN packages which is nice and small while still hand workable, but it seems like chip vendors would rather have large numbers of pins. For my own purposes I usually don't want that many and would rather keep the package small.

It doesn't matter if the via size is bigger than the distance between pads, or the ball, if in fact the via does not need to be there. All that does matter is whether the via is bigger than the ball sitting on top of it, and enough so to touch the next ball over.

Note that for mass production, you can't put a 'standard' via directly under a BGA/WCSP ball, as the via will 'suck away' the BGA ball via capillary action. You'd need to ask the board house to plug the via, which likely brings it into the 'expensive' range of things again.

OK, reading more carefully, I see that the actual minimum via diameter on that board process is too big. It is sort of understandable if they need room for the interior plating. That is very tiny!

It is very possible that general availability of chips like this might press the board houses to develop techniques for accessing all the pins. I'm sure that we'll see some competing creative solutions.

The specs on the laser for an LPKF say plated vias down to 200 um diameter.

Seems like that might be just small enough to make this work?

I imagine a microvia cut by laser would work quite nicely on three of those pins.

The fourth pin, Vcap, would be frustrating, because using two vias to place a capacitor on the opposite side of the IC is labor-intensive, and using two vias to place a capacitor beside the IC is a bit of an unnecessarily long signal path for a filtering component. I'd rather gouge a hole and solder a capacitor directly onto the IC between Vcc and Vcap, but "gouge a blind hole in the dielectric and solder an 01005 capacitor to the IC" is not a commercially viable answer either.

Maybe pray your design doesn't need Vcap or that this can be tied to GND?

This is an actual technique used for these small packages! It's called "via in pad." Unfortunately it's not as simple as putting a hole in the pad because during solder reflow, the hole will wick the solder ball away from the chip, causing an open connection and possibly sucking the chip down and causing other pads to fail too.

Proper via-in-pad is a cost adder, because there's an extra step to backfill the vias with metal. Unfortunately it hasn't trickled down to hobbyist 4-layer processes yet.

Couldn't you fill the via with solder with a soldering iron before you place the chip if you're doing a hobbyist 4-layer process? Or do you mean the kind of hobbyist 4-layer process where JLCPCB solders the parts on too?

Hmm, maybe you could. I haven't tried it. You'd need to make sure that both sides of the via are un-tented (no green solder mask) so that the solder would flow through. The via would need to end up flat so the solder ball on the part would stick. And you still might get solder bleeding through when you reflow.

For high-ball-count FPGAs, it sounds super tedious to prep. And obviously it's a no-go for machine assembly. But for smaller stuff it sounds feasible!

Too bad that the chip's price is not tiny. $0.5 per HC32L110 seems pretty expensive given that RP2040 is $1.

Nonetheless, it is an interesting read.

Btw, Is Sprite_tm still working at Espressif? I always wondered why Espressiv have not produced a cut-down, cheaper version of their Extensa or RISC-V based MCU.

RP2040 is eating their lunch at the low end.

I've been using ESP for a while and they are trying things with RISC, and might eventually be lower cost.

Does the rp2040 have wifi and bt?

Espressif problem is that their various mcus are very similar in features and for a long time lacked USB which, for example made a RP2040 great for micropython where as circuitpython (adafruits version of micropython) dropped support for ESP32.

Realtek, NordicSemi and rpi seem to be catching up to them in the hobby-space area.

At one time Espressif chips were said to have real problems operating at, and reliably coming out of, extra-low power states. Is that still true?

Coming out of low power state (via pin or timer) has never been a problem. Until recently (March 2021) there was a problem turning off the 2.4GHz radio so it actually stopped using power.

>Too bad that the chip's price is not tiny. $0.5 per HC32L110 seems pretty expensive given that RP2040 is $1

Little do people realize that $0.50 price difference is absolutely massive when you're shipping products designed to be cheap and in high volume and I assume volume manufacturers can get even lower prices than $.50 when they buy 10.000+ units.

Anyone who cares about six sigma is not going to use barely documented or characterized IC from China. I was commenting, and the article was as well, from hobbyist perspective.

I know dozen of people in Espressif, including the boss.

A lot of Western employees left the company, or relocated because it's harder, and harder for a Westerner to live there with each passing year, 100% true.

Most of them delivered their value as being an interface with the extensive developer community who jumped on "better than nothing developer support" from a chip company.

Now, however, their Chinese clients outnumber, and outsize Western customers.

Espressif employee, and I'm not sure what your point is... the absolute amount of Western people working for us in Shanghai has only gone up on average, and globally it has skyrocketed (relatively speaking) since we opened thriving offices in Brno (Czech republic) and Puna (India).

It appears, at least in EU and US markets Tuya, and others, have 'abandoned' Espressif ( mostly replacing it with Realtek ICs) for their IoT solutions. It's nice to hear that Espressif is sound and well.

"replacing it with Realtek ICs"

Which ones?

You can see the list here: https://developer.tuya.com/en/docs/iot-device-dev/hardware?i...

Most devices use modules based on above: https://solution.tuya.com/hardware

Some Tuya modules are compatible with ESP12F footprint so they can be converted to tasmota or esphome by de-soldering.

The RP2040 is 7 mm x 7 mm. The HC32L110 is 1.6 mm x 1.4mm. That's about 22x bigger, not counting the thickness (0.9mm for the RP2040). You can fit 20 HC32L110s in the footprint of the RP2040. There are a huge number of applications where the physical size totally excludes the RP2040 from consideration, like my tongue piercing, regardless of how cheap it is.

In the past Raspberry Pi has had fake promotional pricing for the Zero: they said it was US$5, but if you wanted to buy 100 or even 10 Zeros, you couldn't get them at US$5 each, or, in fact, at any price. I understand they're not doing that with the RP2040?

Pioasm looks super cool.

> like my tongue piercing

I really hope you go with RoHS for that...

That's not a serious consideration. People have lead bullets lodged inside their bodies for a lifetime without lead poisoning except in cases of extreme fragmentation. In most cases, and particularly in the case of metallic lead, RoHS represents the triumph of paranoia over reasoning.

The comment was more in jest, but RoHS is more than lead.

    Cadmium (Cd): < 100 ppm
    Lead (Pb): < 1000 ppm
    Mercury (Hg): < 1000 ppm
    Hexavalent Chromium: (Cr VI) < 1000 ppm
    Polybrominated Biphenyls (PBB): < 1000 ppm
    Polybrominated Diphenyl Ethers (PBDE): < 1000 ppm
    Bis(2-Ethylhexyl) phthalate (DEHP): < 1000 ppm
    Benzyl butyl phthalate (BBP): < 1000 ppm
    Dibutyl phthalate (DBP): < 1000 ppm
    Diisobutyl phthalate (DIBP): < 1000 ppm

Yeah, some of those, like hexavalent chromium and (non-metallic, non-sulfide) mercury, are pretty bad; definitely not things you want in your mouth 24/7. Others, like dibutyl phthalate, are probably harmless. Mercury sulfide is perfectly harmless, and metallic mercury is commonly used in dental amalgams with acceptably low toxicity.

It wouldn't be surprising if whatever they replaced the phthalates with turned out to be more toxic. RoHS isn't rational, at least as a way to improve people's health or reduce environmental impact. Putting politicians elected by the ignorant in charge of engineering design by genuine hackers is a recipe for disaster.

RPi are making their first inroads to supporting volume commercial use. You can get reels of RP2040 at $0.70/pc. https://www.raspberrypi.com/news/raspberry-pi-direct-buy-rp2...

Thanks! Of course I'm most interested in volume noncommercial use.

I think 5 yuan is the sample price. Surely this thing can get very cheap.

Amazing. I love all posts like this.

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