AIUI the SoC is not open, but the CPU design it contains, XuanTie C906, is.
It would even be decent if it had standard V extension, but sadly it uses an incompatible pre-standard draft.
AIUI the SoC is not open, but the CPU design it contains, XuanTie C906, is.
It would even be decent if it had standard V extension, but sadly it uses an incompatible pre-standard draft.
They just open-source a light version of the C906, the OpenC906. For instance OpenC906 does not contain the vector extension.
But even the OpenC906 is only partially open-source. They only disclosed verilog code generated by an internal tool, so the real design source code is not open. Worse, they don't open source testbenchs which makes any modification or verification very tedious.
[0]: https://polly.llvm.org/ [1]: https://en.wikipedia.org/wiki/Polytope_model
There's also the observation "keep simd vectors small but many" (e.g. Apple's arm chips) over "super long vectors" (intel avx512) is superior as it is much more flexible whilst delivering similar performance for tasks that are amenable to larger vectors. Having an architecture pushing towards the latter seems a retrograde step to me.