With a custom chip interconnect which has its wires made with lithography

Assuming they're on different dies, it would be the same way they connect the thousand or so pins (of an FPGA or CPU) from the die to the BGA/PGA/LGA package: interposers with wires whose widths are in the nanometer range

Same way AMD did it with their HBM GPUs. There's was 4K wires, but once you've moved to etching the wires with lithography, even millions of wires wouldn't be impossible.

The two dies and interconnect are all part of the same silicon. In the chiplets used by AMD and many others, they use separate CPU dies with literal wires between them. This replaced the wires with hard silicon.

Disadvantage of this technique is yields will be worse because the individual component is bigger, and this is limited to combining exactly two chips because it's not a ring-bus design.