Unofficial yet comprehensive FAQ for LoongArch
blog.xen0n.name
blog.xen0n.name
To the point where the Linux kernel port for the architecture was a straight copy and paste of large parts of the assembly code from arch/mips (with the replacement of the copyright headers being among the largest changes in some cases).
Sadly it's exactly what you would expect of a Chinese ISA.
This makes riscv claims about having the first open ISA untrue, but that's a whole different discussion.
I don't know that it has always been completely open. They have had licensees in the past, and it has been opened then closed at least once in the past, by the looks.
At any rate I don't really know what the status of the MIPS architecture is or its owners' relationship with the LoongArch people. I'm not suggesting they are in breach of copyright or any private agreements with them.
But it really is just MIPS. They tidied up a few minor things like delay slots, and adding some basic vector stuff, and tweaked instruction encodings. Then rebranded the whole thing and did copy-paste jobs on large swaths of code when submitting their architecture "ports".
I'm surprised they let that fly. Removing existing copyright headers from code you copy wholesale is a very bad idea, even if the license is compatible. Especially if you're making a copy as a new file, so there is no Git history to trace past authorship.
Ordinarily I wouldn't assume that is more than a careless mistake, but with the deliberate and pervasive downplaying of the relationship to original works it's not a very good look.
As for the "downplaying" of facts then: the original article is in Chinese, for a Chinese audience whose sentiment towards Loongson (or just about any "domestic CPU" development) is quite different from the typical Western think; so I have to tone down a little to maintain neutrality, both for presenting the Loongson side of argument, and for not needlessly enraging the more radical readers. And it certainly seems the translation has this "quality" preserved enough to be noticed...
Anyway, although the 3A5000 is remarkably faster than its predecessors and all RISC-V offerings that I know of, and is readily purchasable (which is the main reason I'm doing LoongArch work btw, uptake of this architecture may even help RISC-V in the end), the company may well not be worthwhile to support; it's already an entirely different company from the old Loongson 2F era. As we actually have enough Loongson criticizers even in China, I think I'll edit the FAQ to include more critical opinions (in both versions, of course).
And thanks for the frank comment!
> Loongson moved to their own processor instruction set architecture (ISA) in 2021 with the release of the Loongson 3 5000 series.
So, again, the question is - why just not switch to RISC-V at this point?
...unless this isn't actually very different from MIPS, and is just a renamed clone of MIPS, but they're pretending like it isn't? (Which would answer my question.)
As for why bother, the goal of the project is Chinese independence from Western tech. Therefore it must be "different" but not different enough to cause much actual work or problems.
Think of it as an ISA with Chinese characteristics.
so the question is basically the opposite: why riscv when MIPS already existed and was being used by third parties?
MIPS, POWER, and SPARC, AIUI - all open enough that you could make your own processor using them.
I don't know much about the differences, but the system of standardized extensions is pretty cool and makes the same base architecture applicable to a wider range of applications.