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Would it work though? The transistors are quite large compared to today's processor's transistors, and at that high frequency the routing delay for the signal to travel around transistors is quite significant. This seems more useful for a low-transistor-count high frequency device.

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It’s more useful for the intended uses. OTOH, it’s always fun to misuse technology.

There would need to be multiple carefully positioned clock entries or a fully asynchronous design rather than just a copy of the NMOS layout, but it’d still be a lot of fun.

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