A Crash Course in Modern Hardware (2010) | Hacker News Reader

A Crash Course in Modern Hardware (2010)

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86 pointsTomte17 comments

This appears to cover at a high level roughly a "Computer Architecture 201" course: explaining pipelining and cache coherency, with discussion of why/what (but not how) speculative execution, out-of-order, and branch prediction. If you have taken such a course before, this will likely be nothing new to you; if you haven't, it may be interesting.

Or if you took that class back in the mid-90's it might be interesting. ;)

That was my thought - either this isn't a crash course in "modern" hardware, or hardware hasn't progressed much in the last 20 years.

At the high level that this is presenting, there really hasn't been any progress in computer architecture. That's not to say that there hasn't been any improvements going on, but the improvements are more like "branch prediction is X% better" [1] or "we can issue an additional instruction per cycle", which don't have a major impact on the overall story presented here.

Nor have any alternative architectures really demonstrated themselves to be competitive. GPGPU programming has become a lot more salient, but GPGPU itself is largely the standard CPU programming model with speculative execution logic tuned way down and SMT and SIMD tuned way up (both of which would have been facets of modern hardware even at the time of this presentation). FPGAs have been "the next big thing" for, gosh, 30 years now, but they've remained relegated to niche roles.

[1] Indirect branch prediction in particular has progressed a lot even in the past decade.

You might also like my recent presentation on understanding micro architecture:

https://speakerdeck.com/alblue/understanding-cpu-microarchit...

The presentation was recorded and is on YouTube

https://youtu.be/Pa_l3aHCoGc

A couple past small threads:

A Crash Course in Modern Hardware - https://news.ycombinator.com/item?id=3467493 - Jan 2012 (2 comments)

A Crash Course in Modern Hardware - https://news.ycombinator.com/item?id=1394966 - June 2010 (9 comments)

> Speed of Light

> Takes more than a clock cycle for signal to propagate across a complex CPU

Wowers, I had never considered that

Well, that has little to do with the speed of light though, it has more to do with delays due to parasitic capacitances and slow motion of charges that form the conducting channels inside transistors.

Light travels 1 foot per nanosecond in a vacuum. (Electricity in wires is slower.)

A 1 GHz processor has a 1 ns cycle time. So yeah, with multi-GHz clocks the speed of light certainly does matter a lot, and it's one reason why keeping everything on the same chip (whenever possible) is important.

Parasitic capacitance and inductance and carrier transport speed are inportant too, but it's not correct to state "it has little to do with the speed of light."

1 foot per ns.. that really confuses me.. Why not something simpler such as 300000 km/s? :)

Lesson 1: it's almost all locked down by the vendor. Even the development tools.

Cool! Anyone have resources on what has changed since then?

Fair warning : video of really poor quality. Blurry, white-washed presentation screen unreadable, camera follows presenter instead of focusing on screen.

To be more fair there is a pretty crisp PowerPoint on the right that is synced to the video that enhances the presentation quite a bit.

Can someone provide context for this?

The presenters have done interesting stuff with Java on modern hardware, I would expect it to be good.

Multi-core realities required teaching developers about the abstracted-away hardware. This talk is a continuation of the surfacing of hardware reality at the language and library levels.

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