Silicon die teardown: a look inside an early 555 timer chip | Hacker News Reader

Silicon die teardown: a look inside an early 555 timer chip

righto.com

145 pointspicture42 comments

Hans Camenzind, the 555 designer, devoted most of a chapter in http://designinganalogchips.com/ to the 555; the beginning of chapter 11 tells the story of how it was born, and then he tells you how he'd design it "now" (02005, 17 years ago and 34 years after it originally came out, though I think he published one of the redesigns in 01997), either in bipolar or in CMOS, and, more importantly, why; and some helpful tips on how to debug oscillator designs in simulation.

At first I didn't see this, but Ken linked Camenzind's book in the article footnotes. It's highly regarded and free online.

Shirriff's schematics are a lot nicer-looking than Camenzind's. I don't know what software Camenzind was using to draw his schematics, but despite being well organized and laid out, they are superficially rebarbative, almost as bad as KiCad's. Square dots, bright red transistors contrasting with bright green wires, barbed arrows on transistors, collectors intersecting with emitters at the base (or, randomly, not), active-low overbars that are the wrong length, resistors full of 90-degree angles and only four corners, no line width variation, P-channel MOSFETs with the arrow overlapping a wire-connection dot, MOSFET gates too far from the rest of the MOSFET, text overlapping wires, u for μ, etc. The effect is as if he did every schematic in Comic Sans.

There is a fascinating interview with this great inventor: https://www.youtube.com/watch?v=j3vpu67uu28

Giant 555 Timer using discrete components

https://hackaday.io/project/182863-giant-555-timer

Similarly, a giant 555 Timer using vacuum tubes!

https://www.youtube.com/watch?v=bjAlzA4Cyys

I was thinking exactly this when reading the article. thanks

Wow, I always assumed that the actual "live" part of the chips were most of the packaging - the second picture makes it look like the chip is 99% epoxy packaging and 1% silicon. Is that right? Is that typical? Is the packaging that big to separate the pins from each other or just to make it something humans can handle/keep track of?

> Is the packaging that big to separate the pins from each other

Yes. DIP packages have standard pin spacings.

https://en.wikipedia.org/wiki/Dual_in-line_package

This holds true even on current CPUs, although they're obviously not packaged in the same way.

Back then, printed circuit board technology wasn't as advanced so chips usually had 0.1" spacing so there was room for the PCB traces. The chip's package was much larger than the silicon. Nowadays, in something like a phone, you want the packages to be as small as possible. You can now get a 555 timer in a package that is 1.4mm on a side, which is not a lot bigger than the silicon die, but still limited by the spacing of the solder balls.

I'm curious about why the DIP packages still exist. As a hobbyist I'm glad they do, but I can't imagine the hobby/education market is big enough to support a wide variety of ICs being made in the oversized breadboardable format. Are there any major commercial users?

Lots of high volume electronics, especially power electronics, still use through hole parts. They can use a cheap single-sided phenolic board with a single wave soldering pass. DIP packages are (usually) more expensive than SMT ones, but larger parts (power transistors, electrolytic caps, connectors) are usually cheaper and more robust in THT.

You probably wouldn't use DIP packages in most modern designs unless it's a low-volume part that you don't mind hand-soldering. However, DIP packages have been used for so long in so many things that the most common DIP ICs are going to continue to be manufactured for a very long time I think.

It would be interesting to know what the statistics are for the global production of various DIP package ICs. Presumably the production of the DIP variants of 555, TL074, and similar ICs peaked at some point and started to decline, but maybe not.

Apparently it's still economical to produce fairly specialized DIP chips, like reproductions of the 3340 [1] voltage controlled oscillator chip used in a lot of synthesizers. Low volume specialty chips tend to be more expensive, though, which I suppose justifies the costs associated with manufacturing.

[1] https://aisynthesis.com/product/alfa-3340-vco-ic/

Sometimes, the silicon die itself may be "pad-limited", ie. the minimum size is determined by the number of I/O pads on the die, which have their own spacing requirements.

The connections can take up the bulk of the package.

Heh almost forget the venerable 555.

Back in the day just out of high school, I was taking a course on Digital Microprocessor Technology in Jamaica and we used 555 chips on our breadboards wired up with a CPU (I forgot which one -- might have been a 6800), at the time the "College of Arts, Science and Technology".

I had no idea this course was for tech guys working in factories who needed to maintain and run the industrial control equipment. I was just interested in the stuff and decided to take that night course too.

That short course (and the 555) were what got me a true understanding from the ground up, of digital computer technology.

Which is why, we will hire computer science graduates from any country these days. That curriculum is very similar everywhere.

Author here for all your chip questions...

What kind of chip layout/validation tools and methods would have been used for this chip? The layout does not appear to be as dense or uniform as other chip images that I've seen. Is the large spacing between elements more indicative of a prototype that would have been refined later in production?

The chip was designed in 1971, so layout would have been drawing it on a large piece of paper and then cutting the masks out of sheets of plastic (Rubylith).

The layout looks typical for that era. Keep in mind that this is an analog chip, so resistors take up a lot of space. Also, with just 24 transistors, you don't need to squeeze every bit out of the layout. I've looked at other versions of the 555 timer and the layout isn't much better. Even the CMOS 555 has a lot of wasted space.

Any particular favorite book or course recommendations for learning about vintage (or current) IC design? I’m not looking to go into the field, just programmer who thinks being able to puzzle out things like die shots is really cool.

I stick to ICs from the 1970s and 1980s; after that, things get too hard to understand. Books from that era provide a reasonable description.

For digital circuits, Mead and Conway's Introduction to VLSI Systems is a good source of information. It's available online: https://ai.eecs.umich.edu/people/conway/VLSI/VLSIText/VLSITe... (the link seems to be down right now, though.)

For analog circuits, the book "The Art of Analog Layout" is good if you can find a cheap used copy. The designer of the 555 timer wrote an interesting book "Designing Analog Chips" which I found very interesting. It is available online: http://www.designinganalogchips.com/

There's also an online tutorial on IC reverse engineering: http://siliconzoo.org/tutorial.html

Thanks so much!

Wow, thanks for the book links. I remember the VLSI book from my uni curriculum.

Do you have a layman's explanation for what the 555 timer is used for and how it works?

It's such a simple IC that it's hard to see what it can do. But if you stick some resistors and capacitors around it in just the right ways, it can do so much. Google "555 examples" for thousands of example schematics. Wikipedia has a few examples: https://en.wikipedia.org/wiki/555_timer_IC#Modes

The basic idea of the 555 timer is to generate a pulse of a fixed timing, from microseconds to hours. But it is a very flexible chip so it has hundreds of applications, operating as anything from a timer or latch to a voltage-controlled oscillator or modulator. As a result, the chip was very widely used.

How it works is that when you charge a capacitor through a resistor, the capacitor will charge relatively slowly. The rate depends on the value of the components. What the 555 chip does is monitors the voltage level on the capacitor. When it reaches an upper level, the chip discharges the capacitor. When the voltage reaches a lower level, the chip starts charging the capacitor. Thus you get oscillations with the desired timing.

Think of it kind of like filling your sink with water. When the sink gets 2/3 full, you pull the plug from the drain. When the water level drops to 1/3, you put the plug back in the drain. This will give you periodic oscillations. The timing depends on the size of the sink (capacitor) and how much you open the tap (resistor).

This is a fantastic explanation. Thank you!

How do you get such a wide range of times with such a tiny capacitor? I imagine there is some magic with multiplying this effect across multiple caps?

For a short delay, you use a small resistor and a small capacitor. For a long delay, you use a large resistor and a large capacitor. The result is that it supports "timing from microseconds through hours." The timing resistors and capacitors are external, so you can select whatever values you want for your application.

It's not necessarily tiny. You could use an electrolytic capacitor with a capacity of a few millifarads, for example. However, the tolerance of larger capacitors is larger (usually 20%, and up to 50%) so that quickly becomes expensive. It's more likely that you'll generate a 10 second or less pulse with the 555 and then make it longer using (for example) T flip-flops. A single 744040 ripple counter IC for example can divide the output by up to 4096.

Thanks for posting. Love your stuff!

Just about every electronic circuit I designed and built as a teenager used one or more 555's. The most practical was a repeater controller for ham radio. The most interesting was probably a pulse width modulator a/d converter.

There was almost nothing you couldn't use a 555 for, and there was almost nothing you should use a 555 for. I remember those circuits not being very stable but then again I am not great at analog circuit design.

"But for a variety of reasons, PNP transistors have an entirely different construction." - Can you expand on what some of those reasons are? And why is the emitter in a PNP circular?

Theoretically you could make a PNP transistor by reversing the doping of an NPN transistor. The main problem is that boron diffuses rapidly, making it hard to fabricate a buried P-layer. Boron also has less solubility than phosphorus, making it hard to dope the emitter. Also, holes have only 1/3 the mobility of electrons, so PNP and NPN aren't symmetrical. To deal with these issues, PNP transistors are usually built with lateral construction (i.e. horizontally). The ring structure ensures that almost all of the carriers injected by the emitter are intercepted by the collector.

(This is based on The Art of Analog Layout, p280. I don't know all this doping stuff myself.)

Thanks! I also have to say that you have a very accessible writing style for what is a rather convoluted topic and that the interactive schematic tool is a great aid.

Seems like the chip shortage hasn't spare the 555 either. Even in bulk orders it seems to come out to 14-15 cents per unit https://www.digikey.com/en/products/detail/texas-instruments.... Didn't this thing used to be a couple of pennys?

Working with modern technologies, it's incredible to me that the transistors are on the same order of scale as the bond-out pads.

Remarkable how such a simple chip can be so complicated. And to think how complex modern CPUs/etc. are in comparison!

What's the difference between N and N+ ? As far as I can tell, N+ just means a higher doping concentration? But it seems very fuzzy as to what 'higher' means?

Yes, N+ and P+ are just heavily doped regions.

Why is everyone in the world going crazy about 555 timers?

Mostly for nostalgic value. You would rarely need something like a 555 in a modern design.

The OG predecessor to the Arduino

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