https://docs.oracle.com/cd/E19620-01/805-4453/6j47hg5qf/inde...
The switched memory architecture. Which was a boon to running Oracle and transaction processing monitors (e.g. Tuxedo) – or, anything that required large amounts of memory and the high memory bandwitdth, but did not require the highest performant CPU.
Also, an extensive network of partners and resellers that made it easy to purchase a SPARC system, service and upgrade it was also a major factor. If one had the money, it was just too easy to buy a SPARC box.
> That it was RISC?
That is where Sun was consistenly lagging behind other RISC vendors until (roughly) the arrival of the UltraSPARC-II CPU. Before then, Alpha, POWER and PA-RISC CPU's consistently outperformed current SPARC / UltraSPARC-I designs. Another part of the problem was that the highly optimising Sun C/C++ compiler was very expensive, and GCC could not generate the code that would be as efficient for quite a while – not until after GCC folks rewrote the register allocator (GCC v2.95 circa?). The problem partially stemmed from the SPARC's windowed register file design. GCC has eventually caught up and has been generating fast (Ultra-)SPARC code since then.