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Comment by sschueller | Hacker News Reader

"But next time I think I’ll just buy the 16GB variant upfront."

Next time don't buy from a company that forces you to spend the maximum if you want to use your laptop after 3 years.

I am hopping but not expecting that this chip shortage will force vendors to make systems more modular again as they can't get enough ram/disk out of the get go. Wouldn't that be a nice world where you can upgrade your laptop or desktop PC yourself?

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Actually, the trend is to put the RAM inside the main chip itself so as to avoid those pesky latency and area-costly PCB traces. The performance improvements this allows are hard to resist and some manufacturers are already falling in (e.g. Apple). And I guess the side effect of making upgrades impossible is nice, too.

Is there actually noticably lower latency when going from sodimm/on MB RAM to memory integrated in SoC? I would expect bottlenecks to be somewhere else, not in those few extra centimeters of traces

Look at Apple's or HBM benchmarks. Also, it's not just the length, but the extra contact points, the "safety" margins for it all (to allow some extra routing distance for lazier/complicated mobo design), etc. all force you to a lower frequency, which also reduces bandwidth.

(IMHO, I would not trade off modularity for that. But the public disagrees.)

Apple uses the exact same LPDDR4x that others route through the mainboard, in stock JEDEC spec, so they don’t really get performance advantages from memory on package.

It's the chipset & CPU that have to slowdown to account for the extra cost to reach it, hidden in whatever stage you call it -- even if the actual DRAM chips may be the same. They're the dumbest part in this entire diagram.

Also, they benefit from larger bus widths, lower power, etc. https://www.anandtech.com/show/16252/mac-mini-apple-m1-teste... ( despite this being DDR4 I have to go to DDR5-systems to find similar bandwidth & latency results ) , https://www.anandtech.com/show/17024/apple-m1-max-performanc... and https://www.anandtech.com/show/17024/apple-m1-max-performanc... ( I have to go quad-channel DDR5 or HBM to find similar results elsewhere)

Time cost is dictated by the clock frequency and timings, not the physical distance itself. Lower distance may help with achieving better specs but Apple is not overclocking the memory, they run JEDEC spec. Maaaybe they train secondary and tertiary timings a little bit tighter, that’s about it.

> despite this being DDR4

It is not! LPDDR IS NOT DDR!! It’s a very very different standard despite the similar name.

> It is not! LPDDR IS NOT DDR!!

And is that what explains the apparent increase in memory bandwidth?

Yes, LPDDR4X in particular is rated for 4266 Mbps (at least that's the only spec available from https://www.samsung.com/semiconductor/dram/lpddr4x/ right now) while the top official JEDEC spec for DDR4 is 3200 Mbps.

4266 Mbps * 8 channels * 2 (bytes in a 16-bit channel) = 68.25GB/s theoretical maximum. (Or 4 channels * 4 bytes in a 32-bit channel, same deal.)

See AIDA64 bandwidth benchmark results: https://storage-asset.msi.com/global/picture/news/2021/nb/lp... — these are from MSI's Intel Tigerlake laptops. There are AMD Renoir laptops with the same memory configuration too. This is not unique to Apple, this is what everyone has now. I guess the new big MBPs might have the largest version of this, but what the regular M1 has is not special whatsoever.

They get power savings from reduced capacitance by reducing the distance from the memory to the CPU from a few cm to a few mm.

Yes, when you get to the very high frequencies of modern RAM, physical distance is significant. For years overclockers have been using mini-ITX motherboards to get the RAM closer to the CPU for higher frequencies.

ITX usage was never about trace length, it’s about having a 2-DIMM board for running 2 sticks – Unoccupied DIMM sockets are terrible!

These days we have the luxury of overclocking boards that are 2-DIMM in ATX form factor.

> Is there actually noticably lower latency when going from sodimm/on MB RAM to memory integrated in SoC?

No.

But it's easier and lower power to run higher bus frequencies for higher bandwidths. Same goes for bus width.

There isn't any latency reduction on the M1, Apple use the exact same 4,266 MT/s LPDDR4X that can be found soldered onto the motherboards on a few window's laptops, and they are just using the stock timings.

I think the main reason Apple are doing it is to simplify their motherboard PCB design and make the design more compact.

Is Intel making SoCs like this yet? All the Core, Pentium, etc. CPUs I've seen are still just CPUs. True Apple is doing this, and ARM Chromebooks probably do it, too.

Intel also makes it, kinda: https://www.anandtech.com/show/16195/a-broadwell-retrospecti...

You bought into Apple marketing. Speed of signal in copper ~20cm per 1ns. 5-7cm of extra track length to a slot would not hurt anything.

Oh my god, did you just discredit the entire field of EDA place & route in just one sentence? This is not your usual 20MHz bus. These are signals that switch at 2, 3, 4 GHz, and there are a shitton of effects that get in the way and limit how fast you can toggle a (longer) wire. Or at least significantly alter the power vs latency vs speed vs noise tradeoffs.

(and no, I most certainly did not buy into apple marketing, since I'm pointing that as a negative)

Did you miss the part where Apple is clocking those chips at same speeds as normal DDR4? Closer placement did not result in lower latency nor higher speeds. Apple M1 is same situation as RPI foundation using POP ram. Requires fewer pcb layers, simplifies layout, lowers cost and as a bonus gives assured future sales due to forced obsolescence. I didnt dismiss anything, I simply know physics and have some experience in high speed layout.

I can understand the claim the M1 has the same timings as off-the-shelf DDR4 (thought this was a nice way to explain the apparent increases in memory bandwidth shown in benchmarks), but here you are dismissing the concept of HBM entirely.

Afaik M1s dont use HBM (which is 1024bit per chip and are their own thing), but ordinary POP ram like RPI. Anything up to 512bits is just cost cutting. Look at Xbox - no problem fanning out 320bit bus in addition to pcie lanes, same for hiend GPUs. 4096bit is where you can claim someone actually uses HBM for performance, like on Radeon R9 Nano/Fury.

LPDDR4 RAM is literally not available in any socketed form factor. The signal integrity becomes too degraded over physical connectors. The solution is to increase the voltage (at which point it is no longer Low Power DDR4) or bypass the socket entirely and solder the chip to the board.

Everything has a tradeoff, including repairability.

I dont entirely buy that considering stock DDR5 goes down to 1.1V using normal DIMM sockets.

Honestly it's quite his fault by choosing the XPS 13, an ultra portable. Take the XPS 15, it's the best compromise between portability and repairability. I have a 9750 or something and chose it because it was just the most repairable laptop at the time. You could replace ram and disk for sure, but also buy new fans directly from Dell, or new hinges, a new battery, a motherboard, you name it. Remove a few screws and you have access to everything, easy to mount and dismount.

So no, the company didn't force him, he just went for portability.

It's his fault for buying a product being sold with defects that are apparently known to insiders?

This kind of shit makes me hope Framework succeeds.

There aren't many options for Windows laptops.

There are HP laptops with user-replaceable RAM, such as the Pro and Elite Books. The 13" ones are comparable to the XPS line in terms of size / weight / performance. I don't have experience with the other sizes.

The top panel being metal is also nicer in my opinion than the weird sticky thing on the XPS.

The company I work for uses those, and they don't seem to have any issues with them.

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