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Comment by ddingus | Hacker News Reader

I have a 16Mhz Apple 8 bit computer.

What struck me is how lean early tools and applications really are. Many are just usable at 1 Mhz.

At 16, things are generally luxurious. Doing graphics, or writing, even running programs in BASIC all make sense and perform.

100Mhz is crazy! Frankly, one could add to the software and take advantage of the fast electronic storage available today and get real things done.

I wonder just what people will wnd up doing on a BBC Micro, or Apple 8 bit machine fitted with one of these.

I want one! Fun project.

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In reality in a machine like the C64, etc. it wouldn't really run at 100mhz, because in that case the bus speed is driven by the VICII chip and the bus access is stolen by it to do its work, and this is all tied to NTSC/PAL speed. So in the design on this FPGA impl it could theoretically internally do a burst of 100mhz-esque work it would only be while the VIC-II (or equivalent in other machines) has given time over to it.

The original article touches on this, the difficulty interfacing an Atari 8 bit, C64, etc.

Yes, and that's precisely why the Apple 2 is still on my hobby / workbench. It's simple to interface with, and with a faster clock, remains useful.

And the Apple has slow RAM and fast RAM in a similar way. Really, to get the machine to run at 16Mhz, it's necessary to copy code into the fast RAM on board the card, leaving system RAM unused.

The Color Computer, Apple 2 and some others were made in a simpler way that did not interrupt the CPU for refresh and or video access cycles. That makes projects like this easier.

This was already an issue on the Commodore 128, which had a 2 MHz "fast" mode but you had to manually engage it, and doing so would turn off the VIC-II. Good for doing large calculations or working in 80 column text mode, but useless for games etc.

Yeah I suppose one could use a CPU similar to this 100mhz FPGA one and just have it do ~50 cycles worth of activity every time the VIC-II yielded control to it. Then it'd be idle for 50 cycles, etc. And then have a "fast" mode like you're talking about to do 100 cycles in a clock.

Memory and peripheral access would be seriously wait-stated though. 50 cycles of action doesn't do you much good if memory is slow. Especially when you consider that programs for the 65xx made heavy use of zero page / direct page as an extra bank of pseudo-registers.

So you'd end up implementing some kind of cache, or memory mirroring, or just moving the whole of RAM in the FPGA... and then you start to wonder why you didn't just do the whole thing in FPGA as a C64 SoC.

I thought that the faster 6502-clone should have its own 64kb RAM and only let writes end up on original RAM. So only writes should be slowed down to the original 6510 free slot.

All reads could be from fast RAM.

Then we have hardware registers and external DMA, those have to be handled specially.

Don't get me wrong. 8 have the Apple on my hobby bench for stuff like this, but I also have my Atari and when I replace it, C64 for gaming goodness.

Just saying...

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