When comparing it to other large designs, I think it’s not exceptional, but also not in the back of the pack. This die is 645mm², or a square inch. We could create a wafer that size in the 1960s (https://en.wikipedia.org/wiki/Wafer_(electronics)#Standard_w.... Note these are for circular wafers, so a 1 inch wafer is about ¾ square inch), so in that sense, it isn’t a surprise that we can make such a chip.

We couldn’t put 50B transistors on a square inch in the 1960s, though. We can now. https://en.wikipedia.org/wiki/Transistor_count lists several larger designs.

So, the engineering is impressive, but not spectacular.

Also, this being a grid of interconnected CPUs means the design is simpler than a single design filling the entire die would be. It’s ‘just’ repeating the same design over and over (possibly with some small variations near the edge)

Of course looking at it without knowledge of the state of the art it is astounding that we can even think of constructing machines with 50 billion working parts

The Apple M1 chip, which is much smaller and has lower power consumption, has 16B.