Next-gen chips will be powered from below | Hacker News Reader

Next-gen chips will be powered from below

spectrum.ieee.org

164 pointsjonbaer82 comments

Question I have is how much heat is generated by that power layer and as it is copper, shifting that behind the silicon - would we not see more thermal mass shifted to the backend of the CPU and with a focus upon the top of the cpu for cooling solutions - how would that pan out? Would we also need some heat-sink upon the base of the CPU. Would we see extra heat shifted thru the silicon layer with this process?

One aspect that I've pondered that would save power would be having the memory closer to the CPU and all that usable real-estate for slots upon the reverse of the motherboard. Sure you would be looking at new case designs in a way or existing ones with new design considerations upon the mounting plate to have gaps to accommodate sockets upon the reverse of the motherboard PCB. That without having to compete with the CPU airspace for cooling and in effect using the motherboard to zone things, could work out well.

Most high end chips with high TDPs are already packaged upside down.

You CPU, or 9 out of 10 recent phone/tablet SoCs are all upside down chips.

https://en.m.wikipedia.org/wiki/Flip_chip

So, it's actually going to be an improvement from the thermals side, especially with TSVs carrying heat from the other side to the heatsink.

The power layer is going to leak less power to heat than the other layers, correct? So the power rails will work as heat spreaders, if not particularly great ones.

Article says this: 10% loss budget in Front side power delivery with a 7x improvement in the future => <2% of heat on bottom.

Not really, no. Pretty much all LSI chips (and even a lot of power / analog stuff these days) is flip chip, i.e. mounted metal-layer down (if you see a BGA or waferscale package, all of these are flip-chip). So the stackup looks like this (roughly to scale):

   Heatspreader
   TIM
   Silicon
   Silicon
   Silicon
   Silicon
   Silicon
   Silicon
   Silicon
   Silicon
   Silicon
   Active layer
   Metal layers
   Metal layers
   Passivation
   Solder bumps and glue
   Solder bumps and glue
   Solder bumps and glue
   Solder bumps and glue
   Substrate/interposer/PCB

What this article proposes is to put metal layers on BOTH sides of the active layer, so you get more metal closer to it. That's what they mean by "powered from below". If you look at a chip today, they're all "powered from below" in the sense that the metal layers are "below" the active layer and power (and all signals) are fed in from "below" through the interposer.

Thank you and appreciate the layer listing - most elegantly done.

> it's consuming 200 W to provide its transistors with about 1 to 2 volts, which means the chip is drawing 100 to 200 amperes of current from the voltage regulators that supply it. Your typical refrigerator draws only 6 A. High-end mobile phones can draw a tenth as much power as data-center SoCs, but even so that's still about 10–20 A of current. That's up to three refrigerators, in your pocket!

This feels out of place coming from IEEE.

I don't know. I bet half of IEEE only worries about data/signal processing in their dayjobs and never thinks about power distribution. Such a comparison immediately makes clear what the problem is.

Especially considering the fact that this is harping on about Ampere. Which is _not_ the number to be looking at here; that'd be watts. That fridge is chugging down 6A at 110 or 220V (assuming it's a new fridge, unless its absolutely gigantic or incredulously inefficient, sounds like that'd be a 110V model) - not at 1 to 2 volts.

If someone can build a fridge that is so efficient, it can make do with 6A @ 2V, dang. Where can I buy me one of those? That's 12W total, I can power one of these for a full hour with 4 AA batteries.

I thought the same initially, and do think the analogy is bad, but a few seconds later I wondered if the point that they were making was that the interconnects carry the same amperage: the required gauge for a connector (i.e. wire) is determined by amps, not watts. As a result you can send more power down smaller cables at higher voltages.

Yeah the ohmic losses in the power delivery networks are the killer and the topic of this article.

That is the point they are making, but comparing it with "three refrigerators" is seemingly invoking the power of a fridge.

To understand what they're saying, you need to understand current as distinct from power regardless of the scale. If you do understand this distinction, but you don't have a feel for what 100 amps is, perhaps a good comparison is starting a car.

> this is harping on about Ampere. Which is _not_ the number to be looking at here; that'd be watts.

You say that like it's obvious. I don't see why.

Agreed.

In my electrical engineering classes, we use amps to determine the gauge of wires.

The important calculation here is watts = I^2 * R

Where R is the resistance of your wire, and watts is the power wasted in your wires.

And I is amps. That little squared sign is a bit intimidating. Under normal circumstances, you want to increase voltage to reduce wire loss. But computer chips only operate at low voltage.

And the reason they operate at low voltages has to do with the micro-scale these SoC transistors are separated from each other. Increase the voltage and you get a shortcut, which will render your chip useless.

This is true but also wrong. The transistors themselves have a specific operating voltage.

On current technology, you are absolutely correct. But if you go and say something "let's do instead those high voltage transistors, so we can deliver to them more power" you can't, exactly because at this scale you'll get shortcuts. It's a physics limitation.

> Increase the voltage and you get a shortcut

It's possible to fill them up with goo that has a much higher dielectric breakdown than air, so I don't believe this is the reason

A transistor it has in its composition a semiconductor material. That's the whole idea behind the transistor as a programmable switch, using a gate(drain) variable intensity to drive how much it gets opened. And if you increase the voltage that semiconductor becomes a conductor instead, hence the shortcut I was talking about - goo or no goo.

Amps is a measure of current. Then they switch to talking about power which is measured in watts, but use amps as the unit. Power measured in Watts is apples to apples. Amps are only one half of the equation for watts. So comparing a fridge to a phone is like.... comparing a fridge to a phone.

Watts are a function of Volts * Amps. So them talking about a fridge using 6 amps at 120 volts is really quite a silly comparison to using 200 amps at 1 volt. The fridge is using 720 watts of power compared to 200 watts from the chip.

In no way is it like having three fridges in your pocket.

They don't "switch to talking about power", they discuss both the power and current to phone chips as opposed to other chips. For fridges, they only mention amps. They're not using the best wording but they're not doing what you claim there.

It isn’t, the example is confusing. It is about amps, as this is due to very low voltage, very high amperage with power movement. As the amperage is the interesting part here (due to conductor sizing, losses to resistance, etc.)

Actually for power delivery networks current (amperes) is mostly what you care about

As someone who has designed many chips, amperage absolutely matters because it is not DC, it has very rapid transients based on workloads and that, combined with inductance, can make power delivery very difficult. Additionally, the high current requires careful design of the package and routing because of resistance and electromigration even in the DC case.

I think the point is that the text makes it seem like you have something consuming the same amount of power as 3 refrigerators in your pocket.

Can you comment on why is there always a drive towards lower voltage? And how this impacts design. A nieve take would have thought higher voltage would equate to less loss to heat. But then with a higher voltage I guess those transients become relatively bigger?

A large part of modern chip design is accomplishing what you are trying to do inside a given power budget. Thus, anything that lowers power is usually a huge win. Switching power in CMOS is roughly proportional to V^2 (basic textbook, real design includes a vastly larger number of issues), so lowering V is a huge win. Also, reducing the parasitic cap with a better process is a big win for a multitude of reasons. But shrinking the process generally would require the voltage to scale also because the gate oxide was getting thinner. That is not really true any more as we reach supply voltages that are so close the Von of the devices, but used to be a clear trend.

High voltages are good when you want to deliver power because that is what you need (motor HP, space heater, etc.). But we don't use an IC for power, we use it to do logic, and in that case, logic is just much more efficient at low voltages.

A modern fridge compressor uses less than 300W (for a big one). They're actually surprisingly efficient.

Even ancient ones don't go over 300W, but 6A at 120V is 720VA which even with a terrible power factor of 0.5 is still 360W. Fridge compressors are usually 2-3A, or 100-200W.

"[..] Austin Wilde held up the source of power that had enabled a Disinto to chew up a mountain in half a second - two flashlight batteries!"

It's amazing how well Asimov's robot stories have aged in these A.I. times.

No, amperes is the number to look at. If you just want to deliver more power on the SAME wire, you can do so by increasing the voltage. This is why a pretty thin wire can deliver power to a high speed train, or even an entire town. Trains often use voltages in the 16-50 kV range, and power lines that power entire towns can be upwards of 100 kV; at that voltage the entire town's average power might be only a handful of amps. (Heat dissipation of a resistive wire is I^2*R, not dependent on voltage.)

In the case of a CPU, higher voltages don't work with the semiconductors, so they have no choice but to use high amperes, and that becomes a problem.

>>a fridge that is so efficient, it can make do with 6A @ 2V, dang

That's 12watts. You just need some great insulation and enough time. If you are willing to never open the door and can wait days for your beer to chill, a 12-watt fridge is very doable.

Voltage drop = current × resistance. Power lost to heat = current² × resistance. I think they are making a reasonable point that resistance losses are likely to be a much bigger problem for a CPU than for a large appliance with similar wattage. 10-20A is an enormous current even on household wires (most household circuits are rated for 15-20A), and while wires on CPUs are shorter, they're also a lot thinner.

The wires in the refrigerator would likely be unable to handle 20A at 2V.

No, they handle it fine.

why?

Amperage determines the wire diameter. High amperage means very wide wires.

I think their point is that this is what ultimately drives the need to power from below.

It's frustrating to see them not spare a couple sentences to clear up a misconception that _many_ laypeople suffer from.

Sure, _we_ know the difference between amps, watts, and watt-hours, because we paid attention in science class, but most people still get them mixed up.

To be fair, this is not a publication for lay-people; it's obviously and explicitly a publication for electrical engineers, which would not need these things explained. But it's still a terrible analogy since the phrasing seems to imply that it's talking about power, when it's actually talking about current.

And possibly a heads up to tech selection people about what’s coming soon. I think you can expect those people to have potentially taken EE 101.

because it would lead someone not already familiar with what those figures mean and how they relate to one another to come to the wrong conclusion. and someone who does know doesn't need the analogy. When I think "fridge", I don't think "what wire diameter do I need to deliver power", I think about a big old hunk of metal using a bunch of power

> would lead someone not already familiar with what those figures mean and how they relate to one another to come to the wrong conclusion

It's the IEEE. It's not designed for average consumption. That's almost OP's point, which make this counterpoint a bit comical.

that's fair, although I would argue it's still a bad metaphor, I had to do a double take to get what they were getting at so it served to distract me rather than make the point.

What is Ohm's law? Come on, IEEE!

I don't see anything wrong with it. That refrigerator will be a real constraint on the width of the power wires of any place it's installed on. And adding the current of your devices is exactly what you need to do to size your power lines.

It being on IEEE, I can't imagine anybody on their target audience will be confused and imagine they are talking about power.

Instantaneous power draw can be quite considerable too, when you have millions of transistors switching in a short lapse of time. Typically you cannot really include capacitors on the die, so those are close to it. It might have to do with it, but I haven't read TFA yet.

Actually, inductive ringing on the power grid is generally a bigger problem than lack of capacitance.

Generally, not all the transistors in your chip switch. The transistors that don't switch provide a charge reservoir to draw from for the transistors that do.

The problem is then backfilling all that current that got lost and you have to do that within one clock cycle--which is the "lots of current" that this article is talking about.

Because you have these pulses of current snapping from on to off at fairly high frequencies being fed over long distances with very little resistance to damp them, inductance kicks in and starts causing oscillations (LC tank).

However, at this point Moore's Law about performance is dead (2x every 18 months), so this is not a very big deal.

Moore's Law about cost is still alive (double the number of transistors/halve the cost every 18 months). So, the big deal currently is in the embedded space where leakage is more problematic because the die is mostly determined by RAM and flash sizes which goes directly to current leakage and die size.

Thank you for the insightful comment!

>That's up to three refrigerators, in your pocket! This is the part where it feels out of place

Amps aren't really relevant here, I have a wrench that will consume considerably more amps than that if you're able to supply them.

Am I mistaken that those 200 amps are distributed among billions of transistors? Is there any point where there is a single conductor carrying 200A?

I would have thought that the actual power distribution is done some other way. How does this 200A actually work in practice? Do they start with higher voltage and step down? This poor analogy means I don’t understand the problem that’s been solved.

I would really have liked to learn this from the article, but instead all I can think of is the one noisy compressor in my 20yo fridge sucking down 6A (probably 3A where I live) over cables almost as thick as a CPU is wide.

Yes, the 200 amps are consumed by the billions of transistors.

As you might have noticed, these power-hungry chips have a large number of pins, and quite a lot of them are dedicated to power, exactly to avoid having a single pin having to carry 200 amps.

Here's[1] the pinout of the AM4 socket, where the pink and green squares represents power and ground respectively. As you can see they make up almost half of the pins.

The motherboard is primarily supplied by 12V these days, which is then converted down to the 1-2V needed using multi-phase buck converters[2]. If you've ever seen motherboards boasting some number of VRM phases, this is what they're talking about. Gamers Nexus has an overview[3] of this as well.

The problem they're talking about is similar to the AM4 socket. You have a bunch of signal pins, and they're connected to output transistors inside the package. You'd like to avoid long connections, so ideally the pin is close to the relevant output transistors on the chip.

However you also got all this power that needs to be supplied, and you gotta spread that out over multiple pins. So it's a challenge to best arrange the power vs signal pins, minimizing the detours either have to take. Long connections means higher inductance and resistance, which is a problem for both signal and power.

Imagine instead the CPU was mounted like a sandwich, with pins on both sides. Then it would be easy, as you could just place all the power pins on one side and signal pins on the other side.

This is the solution they propose, except on the chip level.

[1]: https://www.docdroid.net/6cDW11N/am4-pinout-diagram-pdf

[2]: https://en.wikipedia.org/wiki/Buck_converter#Multiphase_buck

[3]: https://www.gamersnexus.net/guides/1229-anatomy-of-a-motherb...

Thanks for your reply. That makes sense.

So would I be right to say that the problem is that the way power is delivered to individual transistors is getting too complex while the features are getting too small? The article started out by focussing on the total current at transistor voltages, but at 12 volts to the chip it’s just ~16 amps (still a lot!), spread across say 100 pins = 160mA per pin. Which isn’t as impressive as 200A. 200A is clearly not a wire you see going into a CPU.

It’s a shame that the article seems to have chosen to oversimplify the problem at the expense of helping us understand. The complexity of power delivery from the top of the chip looks fascinating, but it lost me at the outset with claims that wouldn’t pass muster with a high school electronics enthusiast.

> but at 12 volts to the chip

It's the chip itself that needs 1-2V, so the buck converter is on the motherboard. So indeed 200A enters the chip. The linked GN article has a nice overview of the motherboard VRM layout.

The AM4 socket has 1331 pins though, so with roughly a quarter of those sourcing current that's 0.6A per pin (the other half of the power pins sinks that current).

I wonder if there is anything to come from wireless power delivery inside chips. If the entire chip was bathed in constant RF, then bits of the chip could pick up power when and where needed via tiny antennas harvesting the RF field. It would require some very tricky control of wavelengths but might eliminate many wires. Lasers might also offer interesting possibilities for delivering power without wires. How small can we make a photovoltaic panel?

If that were possible, wouldn’t capacitive coupling be simpler and achieve a similar goal?

If you try sending RF power to LSI-scale antennas, the LSI-scale signal wires near them will be antennas too.

Since antenna efficiency directly depends on it's size-to-wavelength (resonance), to get them working we have to deliver power at extremely high frequencies, like 3e16 Hz I quess, which is not feasible.

The metal-filled trenches in the silicon need to survive high temperatures, so according to the article copper is out of the question. They "experimented with ruthenium and tungsten" but it's not clear whether they actually built something or whether it was all simulation. Either way, this is likely to make the chips more expensive.

It's a simulation, they don't even have a prototype yet. Quote: "Simulation studies are a great start, and they show the CPU-design-level potential of back-side PDNs with BPR. But there is a long road ahead to bring these technologies to high-volume manufacturing. There are still significant materials and manufacturing challenges that need to be solved. "

I doubt this is true. Mike Mayberry (Intel) softly announced buried power rail last year, as a 'within 5 years' tech. That suggests it has been prototyped, since from final tests to HVM is at least 2 years.

Maybe not great.

Within 10 means an idea with simulation. Within 5 means prototyped. Interesting means never. Or that, at least, is my decoder ring.

For one thing, if a tungsten wire is an order of magnitude better conductor than a layer of copper you normally would use, the situation with power delivery is indeed dire. Tungsten's specific resistivity is about 4 times as high as copper's.

> That's up to three refrigerators, in your pocket!

Bit misleading, there. A != W

Current is the one number you look when talking about power transmission.

...aother one, being Volts (which brings us back to...W). Also AC/DC, Waveshape, RMS/Peak, Frequency, etc...

W is watt ("Watt" -geddit?) cooks your junk, if the phone has a heat issue.

Used to be an EE, back in the Dawn Times...

Voltage is a completely different issue, that has only indirect impact on "how big will this thing be?", at least until you start measuring it by the hundreds.

Of course, all of those are relevant, but the one number that sizes the thing is current.

Off topic: why do websites have a button to “keep reading” for showing the whole post? It’s already loaded, why not display the whole thing?

Two interrelated things.

First, metrics. When you click the button, they get a signal that someone has been reading the page.

Secondly, there are a lot of JS APIs that require human interaction before you're allowed to use them, for privacy reasons. By clicking a button, those are "unlocked" and they can send all your privacy-obliterating data back along with their metrics.

how did we get to this place where dark patterns are this common.

Have you paid to read the article?

That's how :(

The publishers want money, just to pay their bills.

Is there a list of these JS APIs somewhere?

Or a specific search term for this interaction requirement phenomenon? I tried the obvious searches, but got lots of false positives in the results.

I am asking as a non-web developer who cannot resist rubbernecking at the incredible dumpster-fire-on-a-trainwreck that is web privacy.

I don't believe there's an easy list anywhere - mostly because which APIs require interaction, and which don't, is not standardised.

It changes radically between browsers, and browser versions, even before you get to user settings in those browsers that can change it further.

The second point is very interesting, thanks! TIL

Pro-tip: you can probably block these tracking JS APIs by disabling JS, using NextDNS, setting up a Pi-Hole, or usinf uBlock Origin.

3rd possibility is that they are using a lazy implementation of a paywall/way to force you to register to read.

Unrelated, but I wonder if inductive charging will eventually make it's way into chips. The chip could be powered by an antenna on the board below.

This has already happened with cerebras and tesla dojo at least.

Source? I'd be interested in reading more about that.

https://fuse.wikichip.org/news/3010/a-look-at-cerebras-wafer...

Power fed vertically. Not sure it's BPR specifically, but they do mention ~50% efficiency improvement in the PDN so it's comparable.

https://www.youtube.com/watch?v=QurtwJdb5Ew&t=229

I sure am sick of those ICs with pins sticking out of the top. Progress at last!

> they typically consume only about 200 to 400 watts per square centimeter.

That's quite a gross inaccuracy coming from the ARM researchers.

Most chips barely get above 100W/cm², and it's a very hard limit.

For comparison, the surface of the sun is about a seventh of a watt per square centimeter.

The sun emits about 63 megawatts per square meter (6300 watts/cm^2):

https://www.acs.org/content/acs/en/climatescience/energybala...

Were you perhaps thinking of the intensity of sunlight reaching the top of Earth's atmosphere?

Hm, I wish I knew how I did my math originally... you seem to be quite right.

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