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Comment by fleventynine | Hacker News Reader

If we could get similar momentum we have with gcc and LLVM behind projects like yosys and nextpnr, FPGAs would be much more useful and likely be a larger market overall.

I'm willing to personally donate 10k a year to projects like these to liberate myself from crappy vendor tools that I can't improve.

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And what really annoys me about Lattice in particular is that they shut down their community forum and now there is basically no way to get any form of support when using a free license.

A while ago I found a bug in Lattice Radiant that produced broken PLL configurations. I reproduced this and confirmed that it doesn't happen in their iCECube software, but had no desire to argue with their support about why they should even look at it when I'm not paying $$$ for the software...

I permanently switched to the open toolchain and never had any serious issues since...

While others keep their bitstreams closed and forums shut down, QuickLogic has opened theirs. They opened up the arch information needed for the open source tools to correctly support the architecture, which yields a better product for users. QuickLogic also has a forum that covers the open source tools. No need to pay to play. https://forum.quicklogic.com/

Hi Brian, welcome to HN and thank you for joining this discussion.

I will admit that QuickLogic was not a household name for me but the SoCs you have do tick a lot of boxes for me. I have now ordered a Qomu dev kit to evaluate, I am looking forward to see how the workflow/toolchain are like.

A final question, when trying to order a QuickFeather from Europe, I get a 'restricted availability' message that Mouser is unable to deliver the dev kit in my EU country due to 'government regulations'.

In the past I had to go through a few hurdles/forms when using a specific chip for a medical device because it apparently was also used in some form of US defense application. Is that something EU buyers should expect from Quicklogic products in general? It's not a show stopper but it would be good to know ahead of designing anything.

The entire EDA stack from front to back is so ridiculously bad. System Verilog, UVM and the ecosystem that works on it are equally terrible. Just depressing all around.

Once we have a high quality "LLVM of digital logic", we have a great foundation for better high-level tools. It's just a matter of funding and motivation. In my dreams some Chinese FPGA upstart decides to invest huge in the open tools rather than negotiate with the current toolchain vendors...

Have you read the verilog spec? Half the commercial vendors haven’t implemented large portions of the spec or have implemented it differently from each other.

I’d love to have the momentum around open source EDA tools. At this point I’m not hopeful though.

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