When did ESP 32 switch to RISC-V? Are there any comparisons on how the change impacts performance?
September 2019: ESP32-S2. Single core Xtensa LX7.
November 2020: ESP32-C3. Single core RISC-V.
December 2020: ESP32-S3. Dual core Xtensa LX7.
April 2021: ESP32-C6: Single core RISC-V.
Major differences:
Xtensa® dual-core 32-bit LX6 vs LX7 (better FPU I think?)
BR/EDR + Bluetooth LE v4.2 vs Bluetooth LE v5.0
SRAM 520 vs 512
ROM 448 vs 384
USB OTG none vs 1
Plus some minor differences in the peripherals.