I'm sure students in the valley have been routinely exposed to VLSI chip-making, and actually making ICs, since at least the early 90s. I know I was.
The main problem is there are only so many universities with so many sections therefore quite a lot of students don't get exposure, even within a given EE department. And even if they could offer it to all students, many wouldn't enroll, as you're basically doing this class constantly for like a year, for not that many credits relative to the time spent, as it sucks down just tons of hours as one gets familiar with all the nitpicky details that one needs to know. And as one learns to deal with the joy that is CAD tooling.
However, in my opinion, the experience in invaluable. And students that can pass that course, with a successful chip in hand, are hand picked by employers. We sure do.
EE272 at Stanford actually started to post their flow. Another benefit of the open source PDKs.
https://code.stanford.edu/ee272/skywater-digital-flow
There are actually many interesting student designs out there. For example this OoO RV64GC RISC-V core from Berkeley:
https://chipyard.readthedocs.io/en/latest/Generators/BOOM.ht...