He does offer a few indirect references as to why running V8 on a microcontroller would suck. Like the section on polymorphic inline cache for method resolution.
Running V8 implies JIT and there is no JIT on most microcontrollers because they're based on Harvard architecture where no code can be written in data memory.
The ESP32 has IRAM, which you can write to and execute from.
A large number of microcontrollers are ARM based, which isn't Harvard architecture. I presume the thinking is that there's some massive number of Harvard architecture chips in mundane things that lets us say "most" are Harvard arch?
ARM Cortex-M is a harvard architecture microcontroller. What ARM Cortex-M has in common with ARMv8 are the letters "ARM".
Some Cortex-M cores are described as Von Neumann. It varies by specific sub-architecture within Cortex M.
"Modified" Harvard though. The M0 has unified main memory, so JIT wouldn't be immediately ruled out.
Many ARM microcontrollers have Harvard architecture as well, for improved interrupt latency compared to plain Von Neumann.