The first sentence in the abstract is wrong. The buzz words here among RISC-V players are still things like AI and machine learning.
This is quite deliberate: RISC-V is on track to follow the same path ARM took, starting with the cost optimized lower capability parts then progressively moving up into performance optimized parts. This is really the only viable strategy, because no one is going to invest the billions and decades it takes to get a new high performance design into a totally unproven ISA.