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Does QEMU support TSO when used with Apple Silicon?

Do you mean TSG? From https://wiki.qemu.org/ChangeLog/6.0#TCG

> TCG > Added support for Apple Silicon hosts (macOS)

TSO is Total Store Ordering, which refers to the memory model of x86_64. For Rosetta 2, Apple will switch the M1 processor's memory model when emulating x86_64.

Any documentation for this?

Does this mean you can run an x86 VM faster than a snails pace?

I tried an WinXP VM on my M1 Air just for fun but got the performance of an early Pentium. I know emulation is slow but was hoping for a little more.

Doesn't that require installing custom kernel extensions to enable, as there is no API to enable it?

Setting ACTLR_EL1 in a virtual machine (through Hypervisor.framework) is an option.

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