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Comment by teddyh | Hacker News Reader

> What is the overhead for Morpheus?

> Todd Austin: It’s about 10 percent slower on average.

If you accept that kind of overhead, why not just go the Burroughs B5000/Lisp Machine/etc. route and have a hardware instruction set which is essentially byte code for a safe machine, which cannot be tricked into reading and writing in arbitrary places.

Of course, then you would still have the problem of actual security holes in programs which has bugs, which Morpheus effectively hides, by obscuring them.

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A 10% performance hit for "secure mode" doesn't seem at all that bad - run at last year's speed for an additional layer of security.

Something like this for IoT devices might actually provide some of the missing security thereof.

Do processing speeds really still increase 10% every year?

Even if they're not, the processing power at a given price point is increasing by 10% a year, which effectively works out to the same - especially if you use these in low-cost devices that are never updated (IoT seems a perfect fit).

Thanks to AMD, it's actually a little better than that (for one specific year, though the entire ryzen line has been roughly similar)

https://www.cpubenchmark.net/compare/AMD-Ryzen-5-5600X-vs-AM...

I think you're omission of what Todd Austin really answered in the article, on this question, is close to insincere.

> Todd Austin: It’s about 10 percent slower on average. We could reduce those overheads if we had more time to optimize the system. You know, we’re just a couple of grad students and some faculty. If a company like Intel, AMD, or ARM built this, I would expect that you’d get the overheads down to a few percent.

Edit: Take into account current performance hits for e.g. Spectre, Meltdown patches.

> insincere

I was not criticizing the Morpheus CPU. I was using it to make a tangential point about other possible design choices.

Fair enough!

Are you talking about about both Burroughs B5000 and Lisp Machines having a tagged architecture[0]?

[0]: https://en.wikipedia.org/wiki/Tagged_architecture

Mostly, yes. But it’s not just tags, it’s the whole notion of a machine instruction set designed for post-von Neumann-architecture programming. I.e. the instruction set knows that there are such things as functions, objects, processes, users, etc. instead of the OS having to emulate all these things on top of an agnostic and uncaring machine code running on raw RAM.

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