Hacker News Reader

Comment by baybal2 | Hacker News Reader

Just as expected.

Turning back to nineties, it's easy to see that almost all ventures into specialty hardware ended up with mainstream consumer CPUs catching up, and swallowing the niche in a few years time as computer science, and logic design advanced.

Very few computing tasks came out to be truly brute force demanding as people learned how things really work.

Multi-channel audio, and sound effects on CPUs — once thought to be impossible, are now everywher, even smartphone chips.

Getting there was very tough though. Very few people can write a software DSP, and accoustically correct mixers with real time performance even today.

View on HN

Reading comments in this thread, it feels like people still can't believe that in some case neural networks can be faster on CPU instead of GPU.

In fact, there is already real world use for neural networks that only optimized for CPU: an chess engine. More specifically, chess engine that use NNUE (Efficiently Updated Neural Networks) [1] like Stockfish 12 [2]. It run much faster while consuming less watts compared to GPU, can be run on average CPU, and managed to beat GPU based neural networks! [3]

This model (NNUE) already exist far earlier than the model discussed in this thread, yet there is almost no discussion about it on HN nor Reddit's r/MachineLearning

[1] https://www.chessprogramming.org/NNUE

[2] https://www.chessprogramming.org/Stockfish_NNUE

[3] https://www.chess.com/blog/the_real_greco/evolution-of-a-che...

Was the NNUE trained on the CPU though? It’s intuitive that with the small size of a chessboard and the ability to use incremental update of evaluations, it will be faster to do neural network evaluation on CPU. Training, on the other hand, is typically highly parallelizable, so it would be a big development if we are able to do it faster on CPU.

It looks like training is on CPU too: https://github.com/nodchip/Stockfish/blob/master/src/nnue/ev....

NNUE is weird. No one outside the chess/shogi community talks about it because they seem to have a very case of strong not-invented-here syndrome. It's hand-optimised CPU code that doesn't (yet) run on the GPU (which is why it is "faster").

To be fair, they do want to embed it into a consumer friendly application, and the integration for embedding TF or something that can run pytorch models on a GPU without python is non-trivial.

If someone ported it to a GPU, it almost certainly would be faster. See http://www.talkchess.com/forum3/viewtopic.php?f=7&t=76986

There is a PyTorch port available, but no benchmarks unfortunatly. It does seem to be fairly widely used for training though, which is indicative of the speed gains available.

Is NNUE used by any Go AI? I've only heard of it being used for shogi and chess.

Yes you are correct. I wrote "go" when I meant "shogi" - fixed.

GPU have high latency. For a chess engine like stockfish which is designed to search as many positions as possible, the latency of a GPU is a big problem.

Engines like LC0 that do use the GPU work by searching fewer positions but with a heavier eval function. This makes the latency less relevant because it is a smaller percentage of the GPU time.

3D computer games are much more latency sensitive than chess, and work on GPUs very successfully.

This seems like a solvable problem.

Board game AI works by searching through the state space, and evaluating each state with the neural network, then picking the move with best expectation.

So it needs to load the comparatively tiny game state (chess board) into the GPU for each evaluation. The more game states it can evaluate per move, the better it is. It can be in the order of millions.

World of difference btwn "can be run" and "is trained on"

You will find most developers don't actually understand how fast a single x86 core can be when used appropriately. Most are too busy hiding from real hardware concerns to think about such things.

> almost all ventures into specialty hardware ended up with mainstream consumer CPUs catching up

All except for... 3D rendering, image compositing, video encoding, and video decoding?

I'm really struggling to see what you're trying to argue, because we do have multiple meaningful brute-force tasks that most computers today ship with dedicated silicon for.

Yes we can do more real-time audio processing I guess, but that's mainly because CPU speeds increased, not because "people learned how things really worked", or am I missing something?

Don't forget encryption

> Turning back to nineties

And 80s (consider Britton-Lee).

And the opposite too: "mainframes are too complicated; we'll write an OS that does all IO in the kernel (e.g. Unix) and run it on minis that don't have channel controllers". Come the 2000s and every disk drive and even keyboard has a processor it it.

And edge-vs-core computing in the network...

The best part is hardly anyone reads the literature much less history, so if you've lived through a couple of cycles you can see the pendulum starting to swing back and, to mix metaphors, "skate to where the puck will be"

Amen to that. I do welcome the return of "spread out" computing. I agree ease of use is important, but putting everything the CPU microcomputer style makes for a very imperative notion of ease of. Ergonomics without that would be much more elegant.

Random thought: computing may very well be spread out one day if computational machinery is cheap to build but limited by heat. I could see computers becoming much, much larger, but with a smaller duty cycle for a particular compute element to assist with thermal management. Imagine building structures, like tables, walls, or skyscrapers, out of nothing but doped silicon.

It's interesting because in some ways, GPUs are much less specialized than CPUs – GPGPU programming mostly involves treating the GPU like a huge, dumb collection of very simple processors. I expect effects in the opposite direction as well, i.e. that programming languages get better at using GPUs to do a wider set of workloads. For example, I was recently able to prototype an ETL pipeline with no machine learning or matrix multiplication to a GPU and get a ~10x price/performance improvement, which would have been a lot harder even 5 years ago.

In practice it's pretty tough to make this work. If your ETL can't be turned into just math on a <12GB dataset then you will be contending with streaming data from io -> CPU -> GPU -> CPU efficiently. CPU's are really good at multi-threaded io given an evented runtime these days, but GPUs can only do 1 thing at a time. This means that your application will need to batch data to the GPU.

So the real race is between how good you can be at batching vs. parallel dispatch when reading disk from I/O. As parallel dispatch is a more general problem it tends to get more attention.

Or avoid shuttling the data back and forth and go with a unified architecture like the M1. Memcpy is terrible and yet we keep trying to build bigger and better pipes to make it faster with diminishing returns.

I strongly suspect that this is Nvidia's next big move. A giant CPU/GPU hybrid with unified memory. Who doesn't want threadripper scale Nvidia/ARM cores?

Yes, unified memory being the key here. FAFAIK GPUs still use a hub-and-spoke model, where all processing is done in the hub but data is stored on the rim. They achieve their speedup by increasing the number of spokes (data channels). You could do better by moving the data processing to the spokes as well, and using the hub only for orchestration and synchronization.

At least, it's computationally better. But it won't allow scaling the processing power and memory size independently, so it might require a different commercial model.

> Or avoid shuttling the data back and forth and go with a unified architecture like the M1.

AMD has been shipping unified architectures since August 2011. Nobody cares.

The problem is that while a small low power CPU and a small low power GPU living on the same die and sharing the same memory controller will happily share memory, a big honkin' CPU and a big honkin' GPU don't like to share a memory controller. Some of the big advancements in absolute performance in recent years stems from making the memory controller closer and closer to the relevant processor. In recent AMD systems, the pins on the CPU are directly wired to the pins on the RAM DIMMs. Relatively old mother boards shipped when DDRx memory was the standard, and were still compatible with DDR(x+1) CPUs and RAM when those became the new standard; the motherboard has no RAM logic. If you wanted a unified architecture, you're either going to make the CPU talk to RAM through the GPU, or the GPU talk to RAM through the CPU, or go back to the early 2000s and put a north bridge on the motherboard.

In addition to all that, the bottlenecks are different. The bottleneck on a GPU is always, 100% of the time, memory bandwidth. Latency is mostly irrelevant. The bottleneck on a CPU is usually (95%? 99%?) the memory latency. There's no such thing as RAM that will perform well for both a CPU and a GPU.

"Math on datasets that can be parallelized" is a pretty huge swathe of use cases in the Data Science/Data Engineering world, I've probably spent at least 30% of my time on similar problems.

At my first job we used some special SAS product to handle data larger than memory without getting much parallelism, then it was Hadoop, then Spark. Now I can write Julia code that is agnostic over the CPU or GPU and vastly outperforms for the same types of jobs, and where I can run the same code on my laptop or a cluster. It's a huge advance for my domain! I agree it probably doesn't apply to most engineers though.

Even in NLP/Ad-tech/CV spaces a lot of the time is spent in cpu/io bound tasks such as featurization and reading datasets off of disk and shuttling them to GPU. On my most recent model training jobs in TF w/16GB of working memory I sit at an average of ~40% GPU utilization.

Some of this overhead is language specific, and some is due to shitty code. Never the less I'd bet if I didn't need to shuttle memory to GPU or could do multiple things at a time I'd crush my perf number. ( noting of course that the 40% gpu util is roughly 10x better than a CPU )

Tensorflow datasets are pretty great, once you get them really rolling. They do a great job of scaling out worker threads for various parts of the featurization process, keeping an arbitrarily big cache of batches ready to go in ram, etc.

https://www.tensorflow.org/api_docs/python/tf/data/Dataset

aye - the above job was done with TF datasets. They are limited in that the python gil requires multiprocessing, multiprocessing involves serialization in python, serialization involves dealing with the rather extreme object overhead in python ( 24 bytes for an int! ).

Which all means there's a bunch of CPU bound stuff between your job and the GPU/Cuda kernels. How fast your app can deal with the above will influence overall GPU utilization.

While I appreciate that Python is easy and flexible enough to write, it bugs me immensely every time I run into situations like this.

We go to all this effort to build and write stuff in this optimising, fancy framework only for the whole process to be bottlenecked by some silly performance limitation in Python.

It's usually possible to sidestep the python limitations with a bit of elbow-grease. The usual killer for performance is tf. py_function, which does indeed have to respect the GIL. If you can work out a nice way to handle your data without it, it should be able to stick to cpp in the backend and avoid the GIL. (So, data in a format that tf has a parser for, and write transformations using tf methods where you can.)

Interesting, that makes sense. This inspired me to run some checks. The CPU version of the pipeline I'm working on spends about 90% of its time with ~100% CPU utilization in a massively parallel process and 10% of its time on other stuff, mostly io. With the GPU making the massively parallel part ~10x faster, io is now the dominant portion of my code – Amdahl's law in action!

It's only going to be IO-bound because the GPU speeds up the computation so much.

> GPUs can only do 1 thing at a time

Wut? Modern GPUs(ahem, Nvidia) can pipeline very effectively. You can copy to and from the GPU while the GPU is busy working on something already loaded into memory. True, host copies suck, but you can hide them behind compute delays in many workloads.

With GPUDirect, you can even skip the CPU and DMA straight between the GPU and I/O(storage or network controller).

CPUs will have more and more cores to reduce the gap.

Maybe future CPU and GPU and TPU will merge as a new kind of compute unit.

Yeah I disagree with the comparison of GPGPUs to specialized hardware. It’s more a distinction between hardware optimized for throughout of general highly parallel computations and hardware optimized for latency of highly serial computations.

I would suggest a different metaphor, since these days, CPUs also have a bunch of cores:

* GPUs invest more chip real-estate in integer and floating point crunching (ALU, FP).

* CPUs invest more chip real-estate in control logic, prediction and speculation.

Not that these are the only hardware differences of course, like how caching works, and larger vs higher-bandwidth memory etc.

>Multi-channel audio, and sound effects on CPUs

We only got here because Microsoft was afraid of one vendor, Creative, monopolizing positional audio market. This led to killing off audio hardware acceleration in Vista and leveling the playing field.

Only it's not purely specialty hardware in this case. It's a massively parallel computation subsystem that happens to be also able to generate a video signal.

This really makes sense in a way. I once read in a paper that the best thing to have when faced with the task of performing an arbitrary calculation with maximal speed is 1) one core that's a fast as possible (for stuff that must be calculated sequentially) and 2) as many as possible slower cores (for stuff that can be calculated in parallel).

That's not how this works. Dedicated hardware for video games won't be on a general GPU anytimes soon. Neither will those problems that FPGA is solving when the matrices and properties of the calculation are massively parallel and static (or pseudo static require little change). Same with lidar processing or numerous other end uses. Dedicated hardware (in the form of FPGA's and ASICS) is everywhere.

AKA the Wheel of Reincarnation.

I do think that GPUs are here to stay for a long time though.

Yes, but how much until integrated beats separate card in $/performance?

Once I bought a separate i387 chip for floating point. Later it was inside the main CPU.

Lots of jobs where a GPU is a factor of 1000x faster so...

Both CPU and GPU are in large part limited by power delivery and heat. Putting them both in one chip tends to make both of them worse. I wouldn't count on that reversing any time soon.

It is however curious how CPU and GPU become more similar over time, with CPUs getting ever wider SIMD instructions and GPUs becoming better over time with branching code, integer performance, etc.

There is some convergence, but CPUs are still latency optimized and GPUs are throughput optimized which makes for vastly different architectures.

> Putting them both in one chip tends to make both of them worse.

You don’t need to do that for them to share a single memory address space. Putting them together would be useful if sharing caches between them made sense, but it doesn’t.

They integrated it, but you were still buying it. You just saved a couple dollars on packaging.

Similarly, an integrated GPU has a meaningful price advantage at low enough price tiers.

But GPU price and power budgets have been pretty steady for a long time, so I wouldn't expect a major shift any time soon.

Interestingly the later separate i487 chip was in fact a full 486 CPU and 487 FPU on one die, and disabled the 486 CPU in the main CPU socket. Integration really means something, even when the product SKUs aren't there yet.

Genuine question here.... why are GPU's still used for graphics in video games? Is this one use case where the CPU will never catch up or has yet to?

Oversimplifying a bit, CPUs are smart and can do a lot of different things, and a lot of their chip area is devoted to that intelligence. GPUs are "dumb" but their chip area is heavily devoted to absolutely enormous throughput on really big batches. Looking at AWS prices right now, I can pay ~4/hour for 50 4gHz CPU cores or 5,000 1.75 gHz GPU cores. That means the best case scenario for GPUs is ~2,000 times faster. In practice, you'll rarely achieve that, but GPUs can be tremendously faster for extremely parallelizable tasks (which graphics are.)

True. Of course the need for all that parallel processing can sometimes be replaced with intelligence, such as the new video codecs that leverage machine learning. Maybe CPUs will be better for video if those codecs start to dominate.

Yes.. if you're doing something that is just doing the same calculation on a whole lot of different inputs, then GPUs absolutely eat that for breakfast.

In my game, I have a complex procedural generation process that occurs while loading a game. It's not a graphics process, so I originally did it on the CPU. It originally took about three seconds to build the data in parallel across seven background CPU threads on my quad-core processor. But testers who were using low-end dual-core i5s only had one background thread to do that same calculation, and typically reported that the procgen took multiple minutes to complete.

After spending a week refactoring the algorithm to do the same calculation on the GPU instead of the CPU (basically by pretending it was a rendering calculation and writing results out into a "texture" that we could read the results from), calculation times dropped from seconds or even minutes to just fractions of a millisecond, even on low-spec machines.

The calculation that I previously had to hide behind a loading screen was now quick enough that I could freely do it at runtime without even causing a blip to the frame rate. If you've got a problem that they can handle, GPUs are kind of astonishingly fast; even the (by modern standards) low-end ones.

Very true!

If you look at what most graphic pipelines for 1 pixel the amount of calculations for that 1 pixel is not very much maybe a few dozen instructions. But at 1080 that is a lot more (about 2million times more). GPUs are exceedingly good at doing semi small programs over and over across 2000+ compute units. At best in a CPU you may get 64 if you have a super nice top of the line CPU (reality is 2 or 4). The graphs where that change over happens is going to vary considerably across workloads and instructions used. In most cases currently it heavily favors the GPU. Throw in branching or something like that and CPU might become more favorable. But you still have to try it out.

In the case of this article. They are using hashing/caching which, yeah, should produce a fairly nice speedup. Basically the old speedup trick of do the work once and keep the result. But that probably might not translate very nicely GPU. Oh you could get it to run but it may not be as performant. In the game world it would be like what we used to do with sin/cos and just have a lookup table instead of calling the instruction. We just precalled it and had a copy laying around in an array for the most common cases. So it was just a memory lookup and very little compute and keeping the cached result. BUT that does come at a cost if you have to branch on miss.

Now if you could combine the two ideas. Maybe with some sort of mask to the GPU to say 'do not do any work here as it is done already and work on something else' and pre fill stuff in this could be an even more interesting idea.

What you mean by GPU cores here?

In their marketing terminology, the jesters at NVidia are calling SIMD lanes "cores".

For F32 operations, 50 AVX512 cores have 60*(512/32)=800 SIMD lanes. And of course there are about 64 cores per x86 server CPU now at the high end.

By cores, I mean what NVidia calls "NVidia CUDA Cores", e.g. there are 5,120 on the Tesla V100.

Ok. So translated to CPU terms there would seem to be 80 cores ("SPs") in a V100, that each can do up to 64-lane SIMD/SIMT with FP32 data. [1]

(SIMT for NVidia seems to be just a programming model that compiles to SIMD instructions[2], a bit like what you get with ispc on CPUs)

[1] https://images.nvidia.com/content/volta-architecture/pdf/vol... pages 17 and 10

[2] https://www.realworldtech.com/forum/?threadid=195094&curpost...

Yeah, although a "Streaming Multiprocessor" is still less general than a CPU core IIUC.

The geometry calculations across matrices for 3-dimensional euclidean objects are both relatively easy to do directly in hardware and repeated in only slightly varying ways for the various rendering stages.

Given the increasing sizes of framebuffers and textures it makes sense to localize that, although many CPUs now include a GPU equivalent on the same die and many of the same sort of instructions.

A lot of it comes down to how big and independent the working sets are as opposed to strict advantage in computation as well.

CPUs didn’t swallow GPUs though.

Yup. Controversial opinion incoming, but I actually can't wait for the same thing to happen to ARM. The RISC crowd so quickly forgot the purpose of the RISC architecture. Every time I hear someone tell me how the M1 is so fast compared to x86 I just get this picture in my head of a guy in a 1992 Civic DX with a 2 foot wing revving his engine at the Lambo parked next to him. [1]

[1] https://wccftech.com/why-apple-m1-single-core-comparisons-ar...

I think you're wrong but I upvoted because the article does raise a valid point.

Lol what? Can you explain this view more fully? If anything the x86 currently has the two foot spoiler on it.

Sure! I'll keep digging. >D

RISC = Reduced Instruction Set Computer. Reduced instructions result in (supposedly) reduced complexity per instruction (which has failed over time). While each instruction is "simpler" it takes more instructions to accomplish a task. It would stand to reason that it would take more clock cycles to accomplish the same goal on ARM than x86. [1]

ARM processors regularly outperform x86 in terms of instructions per cycle. They have to in order to do the same amount of work. That is literally the whole idea of RISC. Simpler instructions executed quickly. [2]

But this is not why they are fundamentally not as capable. The reason for that is the pipeline. Or relative lack of pipe-lining. [3]

But again, you are comparing a Civic to a Lambo. You have a 3.5w CPU which, per watt, you have the more efficient processor. But that's not good enough. ARM folks love to stand on the efficiency soapbox and preach about performance. You want to have the flexibility of out-of-order execution but don't want to admit the shortcomings that come with it. You have the best performance per watt but you want best overall performance. Which, if you skew every metric in favor of sliced up processors and non-real world benchmarks then sure... Your phone is almost as fast as an entry level laptop when running native code on a single core. If x86 appears slower than ARM it's only because ARM fans have thrown everything but the kitchen sink into their test bench and found the absolute most favorable conditions possible. Anything but admit that their $1200 cell (which was never designed to be faster than your laptop) is "faster per watt per core per thread" than a $150 x86 processor.

[1] https://www.androidauthority.com/arm-vs-x86-key-differences-...

[2] https://www.extremetech.com/computing/318020-flaw-current-me...

[3] http://www.csbio.unc.edu/mcmillan/Comp411F17/Lecture26.pdf

All current Intel/AMD processors (since Intel Core/AMD K6) are RISC cores with a complex instruction decoder in front of them. There's more to a processor core than the instruction set, and both pipelining and out-of-order execution have nothing to do with the instruction set architecture. There have been in-order x86 processors (Transmeta and Via, Intel before the Pentium Pro), and there are plenty out-of-order RISC processors: POWER4 and up, SPARC T4, RISC-V, many ARM Cortex models.

That article is incredibly stupid. From a user perspective, “single core” performance is irrelevant. What matters is single thread performance, and multi thread performance of the entire processor.

This article is... misguided.

They argue that we should be benchmarking saturated single-core performance, but then show in their chosen benchmarks that the M1 is very competitive, benchmarking just below an i9 9880and above a Ryzen 7 4750.

That's a super-fast chip! No excuses like "oh it's Apple's first CPU" are needed - it's right up there.

And in real world usage it's kind of a useless thing to benchmark. See their note on how they had to wrestle with our Cinebench R23 program to get it to accept the load (threads locked to 2, affinity needed to be set after initiating the run but before the benchmark actually started and needed to be reapplied after the first pass) and a cleaner execution would almost certainly be welcome. It would also allow us to test cores working at their full potential.

It kind of shows how these micro-benchmarks aren't very reflective of real-world use.

Reply on news.ycombinator.com