Intel ships FPGA on 10nm node

I read this as further evidence that Intel's 10nm node was ready to ship. Back in the day, memory chips were often the "process leader" as they were relatively simple transistor designs and could be used to characterize a process while the process engineers were tuning it. I had kind of expected FPGAs to fill this role for Intel, and perhaps they are starting to.

From an FPGA perspective its pretty standard except for those 116G serial transceivers. Those are pretty sweet. The original origin of the "south bridge/north bridge" design separation of Intel systems was to allow the CPU to be upgraded while the motherboard's basic IO complex stayed the same. At 116G you can have a LOT of bandwidth between the FPGAs here.

What I'm hoping for is that someone does the RISC-V equivalent of the IO bridge chip. Basically a chip with all of the system peripherals (USB, SATA, Ethernet, Etc.) in one chip, and the processor complex in another. You could further that by developing a new, or using an existing, protocol to create a memory controller interface as well. That would give you the capability to make an end to end open source system (no hidden "management engines") with all of the same features people have come to expect[1].

Watching @tubetime's building video cards and sound cards for old ISA systems made me realize we could totally build a completely open IBM PC equivalent. The challenge for RISC-V folks have been FPGA size and getting all the bits into one FPGA if you want to build a Pentium class CPU. Most of the support chips are all proprietary to Intel and there aren't open equivalents, and most of the SoC chips don't have any way to get optimize around memory or I/O changes. This could fix that problem.

[1] Yes, I know it is a TON of work and unlikely to appear anytime soon but I can dream can't I?