Does anyone know of a headless “simplistic” simulator that uses input config files to define wiring and then outputs the state after a “clock tick”?
Define your circuit with VHDL/Verilog, create a testbench, run the scripts and export to VCD, and then look at the waveforms with GTKwave [1] or your waveform viewer of choice.
write input config files (here: in VHDL) for the simulator (ghdl), and then view the output after x clock ticks (with gtkwave).