Electronics simulation is fascinating, especially given the AI models used to do this. Layout gets especially complex when rf-traces / layers have to be considered or when you want to have an arrangement of traces to high bandwidth components all be the same length. Interaction between multi-layer vias is also insane (the guy who built the UberTooth1 bluetooth hacking dongle has a great defcon talk on the subject).
The best analog I can come up with is the debate / discrepancies between the US and European weather simulation models. Fascinating space, I got to work a few feet away from the Julia team at the Harvard Launch Lab way back in the day at a college internship. Of the few interactions I had with their team they are great people and unbelievably brilliant. If any of you are reading this, my hat's off to your engineering abilities - I'm still impressed by the fact you guys identified an error in intel's x86 instruction sets and yeeted the issue in less than 24hrs.