Reverse engineering the Cortex A8 core using software kernels

Using very simple micro-benchmarks and his understanding of computer architecture, the author exposes some non-published architectural parameters of A8 such as arithmetic instruction latencies, cache latencies, and the physical memory layout. This article is about the ARM Cortex A8 core but his technique should work on any platform. His goal is to show the software programmers the importance of understanding hardware which I agree with.

ps. It is a part of the series which starts with explaining how he setup his test environment (http://www.futurechips.org/chip-design-for-all/tips-optimizing-iphone-apps-development-board-setup-part-1.html) which is cool but the last part, a web-based performance instrumentation tool for A8, is super cool. He hasn't made it public yet but he gives access if you email him.