SK hynix begins offering samples of 176-layer NAND chip (2020)

They have 1tb going for $85 on amazon. You probably check their prices 3 months ago because SSDs have been dropping about 15% per quarter.

Wow 1TB SSD's are super cheap now..

That's so cool.

That drop came with a drop in performance too...

Most of the 80－100 $/TB disks use QLC which is painfully slow (slower than a spinning hard drive) when you outrun the SLC cache... Had to experience this during a drive migration with dd.

The cheapest 2TB drive on SATA III could be bought for $149. But that is not a normal pricing, it will probably take another two year for that to be a norm.

On the other hand 2.5" HDD has been stuck at the same capacity for 2-3 years.

The biggest limiting factor is the ability to etch deep holes with a high aspect ratio. Shrinking individual memory cells along any axis is of limited use (fewer electrons means less durability), so you can't make layers much thinner. Making holes wider can get you more layers, but isn't really a net win for total density. So far, nobody has started stacking more than two decks of layers, so I don't know if we have good data on how cost and yield scale when going all-out on string stacking to reach extreme layer counts. As an alternative, there's R&D into using wider holes, and then splitting the vertical channels in half, giving you two semicircular memory cells per layer rather than one circular cell.

There's also a need to keep shrinking the peripheral circuitry as the number of memory cells stacked above each mm^2 of buffers and charge pumps keeps growing.

One limiting factor as the string gets too long is resistance becomes too large. This is the same reason the 2D NAND string is at 128. Maybe certain material breakthroughs will change that

I know nothing about making chips, but at what point, or for what type of chip, does the heat generated become an issue?

3D NAND is successful and cost-effective because it's made by depositing dozens of layers at a time, then etching at the end of the process. Currently Samsung is in the lead by doing ~128L at a time. All their competitors reach 100+ layer counts by splitting the stack into two decks, eg. Micron's 176L NAND is 88+88.

Yes it’s physically different. You could use QLC memory as if it were TLC (just ignore a bit), but you’d be reducing your storage capacity and (to the best of my knowledge) not gain any speed. You can’t do it the other way around- you can’t use TLC as if it were QLC, you can’t make an extra bit appear that the memory controller can’t read and the memory cells weren’t designed for. Basically, if the hardware was only designed to store and read three bits of precision, you aren’t going to reliably get four bits out of it. The engineers wouldn’t have wasted that much margin.

I don’t think you would intentionally ever use QLC as if it were TLC. Leaving it in QLC mode means you’re writing half the number of cells for whatever data you’re storing, which is going to be the best way to maximize drive lifespan.

That's what SLC write caching is.

As someone who has worked for a NAND based flash memory manufacturer, time is definitely a relevant dimension.

Our whole company was hinged on a patent for a manufacturing technique to make either the source or drain leads a little more pointy so things could run faster and be more reliable with less power.

Also reacted on that. "What's better than 3D? 4D!" :)

Reminds me of the alleged story about Xbox naming schemes. IIRC, Xbox was introduced when Playstation 2 was in stores. Then came the Playstation 3, but you can't sell an Xbox 2, since 2 is lower than 3 and thus must be worse, right? And Xbox 3 or 4 wouldn't make sense since there wasn't an Xbox 2.

So they named it Xbox 360 to bypass that problem.

But then what, Xbox 720? Xbox 361? Of course a new naming scheme had to be devised -> Xbox One. Then Xbox One X, and now Xbox Series X (and S).

Kinda funny how that seemingly small thing escalated to what seems like a series (ha) of workarounds to that initial problem.