New Transistor Structures At 3nm/2nm

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Also, how is that not false advertising then? If I’m told a device is 5nm, and that traditionally meant the gate length, why isn’t it a lie when they’re actually 10nm or whatever? We need to stop calling it “marketing terms” and call it what it is: lies. Just because everyone does it doesn’t make it right.

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If you are doing research into designing advanced transistors with new geometry or new materials (which is what I did my graduate research in), you would be using something like DFT (Density functional theory) for equilibrium analysis and NEGF, Huckel theory etc. for simulating current. These methods only realistically work on ~500-1000 atom systems, beyond which the simulation takes too long to run even on supercomputers (which is what i was using). I think GPUs here would be very useful, but there weren't any tools at the time that were seriously optimized for GPU. The codes I was using were SIESTA/TransSIESTA, Atomistix, QuantumEspresso and others.

For simulating multiple transistors, or transistors with a large geometry (for example 14nm gate length), you would use TCAD simulators that use FEM + measured parameters to simulate the transistors. The equations behind these are traditional semiconductor equations with a bunch of heuristics and curve fitting. The main tool I used was Sentaurus TCAD.

For simulating larger circuits, say a low-noise amplifier or maybe a small DAC, you would use tools like Cadence Virtuoso + the provided PDK from your foundry. The equations here are simpler than the ones used in Sentaurus and they are also calibrated to measurement.

However, I don't feel that you need to have an analytical solution to the Schrödinger equation. In fact even in chemistry we don't do analytical solutions instead using fancy basis sets which allow us to do approximations.

Regardless, I don't think even that is particularly necessary, as quantum at that level means you basically have some level of leakage where the electrons can just tunnel through the barrier created by the transistor when off. So if I had to guess most of it is just ways to rectify this leakage so it doesn't effect calculations, probably similar to a form of error correcting.

(This ignores that you may have to do some initial quantum calculations using Density Functional Theorem to get a guess at how much leakage based off the materials you are using, though if I had to guess most of that work was done a while ago.)

With law and politics I feel there's a similar attitude going around but it's of course more an up for debate topic.

You’ve just discovered another instance of the gellman amnesia effect.

I don't even want to think of the comments I've seen for my main subject (cybersecurity, exploits, and vulnerabilities). I will never be able to correct all of them.

I think some humility would be nice for all of us. We know what we know and we should be aware of what we don't know. I don't know much about web programming, and I freely admit to it. I certainly don't pretend to have anything insightful to say about them.

"Briefly stated, the Gell-Mann Amnesia effect is as follows. You open the newspaper to an article on some subject you know well. In Murray’s case, physics. In mine, show business. You read the article and see the journalist has absolutely no understanding of either the facts or the issues. Often, the article is so wrong it actually presents the story backward—reversing cause and effect. I call these the “wet streets cause rain” stories. Paper’s full of them.

In any case, you read with exasperation or amusement the multiple errors in a story, and then turn the page to national or international affairs, and read as if the rest of the newspaper was somehow more accurate about Palestine than the baloney you just read. You turn the page, and forget what you know.”

And there can be a bit of Dunning-Kruger if you work in a related field too.

Mass producing anything on that scale that will then go on working for years at ~ 3Billion movements per second reliably is simply astounding.

Shrinking isn't always a walk in the park though. Some nodes ago subthreshold leakage became a big problem until they figured out how to solve it.

[1] https://www.intel.com/content/www/us/en/history/museum-story... [2] https://www.apple.com/newsroom/2020/11/apple-unleashes-m1/

Smaller devices use less power so less heat and longer battery life.

Smaller devices mean a smaller chip which is cheaper (although mask costs will be more expensive) or use the extra area for more features like more cache or another processor core.

To Oversimplify.

With a Fixed Yield, and an exact 100% increase in Transistor Density that translate to 50% smaller Die Size.

On a Wafer, that would equate to Double the amount Die you have. All of a sudden your profits increase dramatically.

5nm also have a better power curve so within the same clock speed you have lower energy usage. Hence you can push for higher performance if needed.

The first point of Uni Economics is important for the industry. If you have high enough volume, say hundreds Million of chips per year then it make sense to move to the next node for cost saving. If you have small volume or low margin chip then the Design Cost, which is the most expensive part of chip making, would not work to your benefits.

And it also depends on Wafer price, If 5nm is Double the Price of 7nm then in the above example your unit cost would be exactly the same.

The second point is important for CPUs, and other things that are increasingly computational expensive like WiFi 6 and 5G Modem. You want your Smartphone to last longer on battery so they work better on an energy efficient node.

So basically it is a Cost / Performance trade offs.

If you CPU is 100mm across, the speed of light limits it to 3GHz because that's how many times you can cross the cpu travelling at c. At 10mm you get 30GHz.