Comment by schappim | Hacker News Reader

Comment by schappim | Hacker News Reader

Some high level info on the Pico [1]:

  - New RP2040 microcontroller with 2M Flash
  - Micro-USB B port for power and data (and for reprogramming the Flash)
  - 40 pin 21x51 'DIP' style 1mm thick PCB with 0.1" through-hole pins also with edge castellations
   - Exposes 26 multi-function 3.3V General Purpose I/O (GPIO) 
   - 23 GPIO are digital-only and 3 are ADC capable
   - Can be surface mounted as a module
  - 3-pin ARM Serial Wire Debug (SWD) port
  - The power supply achitecture is pretty simple (you can power the unit from micro-USB, external supplies or batteries)
  - Buy price is $USD 4.00
  - MicroPython & C++ SDK
  - Pinout Diagram: https://files.littlebird.com.au/Shared-Image-2021-01-21-17-39-47-GVzHd.png
  - When using MicroPython, the programming model is similar to other boards where you have to unplug and plug back in the board. I hope this is ok on the Micro-USB port.
  - The isn't currently a version with header pins, so you'll have to add your own, or get one from a Reseller who will mode them for you (like this one [2]).

The burried the lede is that Raspberry Pi have created their own silicon (just like that other fruit company). They call their Microcontroller the "RP2040":

It boasts some impressive specs:

  - Dual-core cortex M0+ at up to 133MHz
  - On-chip PLL allows variable core frequency
  - 264K multi-bank high performance SRAM
  - External Quad-SPI Flash with eXecute In Place (XIP)

Source:

[1] I've had access to prerelease HW and work at: https://raspberry.piaustralia.com.au/products/raspberry-pi-p...

[2] Maddy (with her steady hands) has hand modded 100 of these: https://raspberry.piaustralia.com.au/products/raspberry-pi-p...

The programmable IO blocks look very interesting.

PIO is programmable in the same sense as a processor. There are two PIO blocks with four state machines each, that can independently execute sequential programs to manipulate GPIOs and transfer data.

PIO is highly performant as well as flexible, thanks to a carefully selected set of fixed-function hardware inside each state machine. When outputting DPI, PIO can sustain 360 Mb/s during the active scanline period when running from a 48 MHz system clock. In this example, one state machine is handling frame/scanline timing and generating the pixel clock, while another is handling the pixel data, and unpacking run-length-encoded scanlines.

State machines' inputs and outputs are mapped to up to 32 GPIOs (limited to 30 GPIOs for RP2040), and all state machines have independent, simultaneous access to any GPIO.

Will definitely pick a few of these up to play with.

PIO is definetly interesting stuff.

This has its own assembly language (.pio) to program. Custom peripherals can be implemented by using this assembly.

Raspberry Pi already provides example programs such as custom I2C, SPI, UART (they are different from the hardware peripherals in the chip), logic analyser, LED controller, and etc[1].

[1]: https://github.com/raspberrypi/pico-examples/tree/master/pio

Note that 10Mb Manchester encoding is in there - just what you need for very basic Ethernet.

ESP32 has something like this, where the low-power core executes a state machine. I'd be interested how similar they are.

https://www.youtube.com/watch?v=-QIcUTBB7Ww

First-generation ESP32 has an exceptionally weird low-power core. Retroactively, espressif called this "FSM ULP". For example, among other weirdness, this core has only one way to write memory that:

- writes only 32-bit words;

- only at 32-bit-aligned addresses;

- user program only controls lower 16 bits of the word;

- upper 16 bits are written with, basically, garbage (part of program counter).

Second-generation, ESP32-S2 is supposed to have a regular RISC-V low-power CPU core, in addition to the FSM.

That sounds like an incredible engineering war story. I guess it was done to somehow cut down RAM access? Or a bug in the registers?

RP2040's PIO is more like TI's [PRU] than ESP32's FSM ULP.

All 3 are specialized "secondary" processor cores, but PIO & PRU are fast (faster than main CPU for bit-banged IO), where ULP is much slower (but low-power).

[PRU] https://beagleboard.org/pru

A Gameboy ROM only requires 28 pins so I’m super excited to play around with this PIO feature!

At 360mbps you may try implement basic SDR with PLL trickery.

I wonder how similar the PIO's are to the PRU's on the Beagleboard.

The PIOs are much smaller and less powerful/flexible than the PRU. The PRUs are 200 mhz 32-bit cpus with DSP-like capabilities and 8k of memory (partly shared with the application cpu). They can directly access the analog ports too. I don't know if the PIOs can do that.

Each PIO is limited to 32 instruction words (16 bit words; the 5-bit address is baked into the instruction format so it can't be expanded without redesigning the ISA), its memory consists of some 4-word (32 bit word) FIFOs and two 32-bit scratch registers, and the instruction set is very limited. It can increment so you can do counted loops, but it has no ADD instruction, so e.g. it can't easily compute a packet checksum on its own, much less anything like an error correcting code. It is nice for basic bit banging of things like the Neopixel LED. Someone did DVI video with it (https://github.com/Wren6991/picodvi) but that was really stretching its capabilities, seemingly more of a flex than something really practical. Impressive though.

It's also odd that they used the M0+ core instead of an M3 or M4F, especially since they then bolted on an external divider/interpolator to speed up audio processing. Maybe future versions will upgrade. Perhaps even to risc-v ;).

I've been wondering whether the RPi foundation designed the PIO from scratch for this chip, or if it's an existing block they got from someplace. It strikes me as clunky and maybe old, coming from an era when transistors cost a lot more. As for the chip itself, it's always nice to have a new cheap MCU board, but it's hard to tell what they have in mind for it. A traditional single-core MCU would have been simpler and probably cheaper, and something aiming for more compute power would have been better off with more powerful cores (future versions might have that, and more cores too).

The coming ESP32c3 will supposedly be priced like the ESP8266 (i.e. $2 or so for a module) and it will have a RISC-V core and 300K of ram or something like that, plus wifi, so it in some ways seems more promising. For boards, I like the Longan Nano on seeedstudio, like a RISC-V based bluepill for $6 including a tiny TFT display. Unfortunately it has just 128KB of on-chip flash so it can't run micropython simply, but it has a microsd slot so maybe there is a way to use that.

https://datasheets.raspberrypi.org/rp2040/rp2040_datasheet.p...

Oh nice, it actually has fully programmable USB device and host modes built in, as opposed to the basic USB-to-serial bridge in an Arduino.

I've put some guides on the Raspberry Pi Pico here: https://littlebird.guide/lessons

The Pico is pretty awesome. Arduino and Micro:Bit need to watch out!

Another place in Australia selling them with headers:

https://core-electronics.com.au/raspberry-pi-pico-soldered-h...

Cool. I will definitely get one to port my M0 bootloader on. Wonder why they were so sparse on ADC channels, though.

It comes with UF2 (USB mass storage) bootloader in ROM

Would be perfect to have ble/wifi connectivity on the same board.

Yes, that in combination with Micro Python would make it an esp32 killer for me.

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