> A team at IBM eventually figured out that with a well crafted dance of instructions this could be achieved by taking advantage of specific quirks within the chip.

Details are described at [1], tl;dr:

- store register values in RAM

- set magic value in CMOS

- cause triple fault to reset CPU

- BIOS sees magic value and instead of resetting rest of the system, it resumes from your stored state in real mode

So it's more like a BIOS quirk. A20 gate backward compatibility on the other hand ...

[1] - http://rcollins.org/articles/pmbasics/tspec_a1_doc.html