Also worth checking out James’s simplified version designed for the Lattice iCE40 [1][2].
[1] https://www.excamera.com/sphinx/article-j1a-swapforth.html
[1] https://www.excamera.com/sphinx/article-j1a-swapforth.html
iCE40 FPGAs come with up to 7,680 logic cells.
The J1 was designed for a board with a Xilinx XC3S1000, which has 17,280 logic cells.
> A complete J1 with 16Kbytes of RAM fits easily on a small Xilinx FPGA.
I'd guess the CPU itself would easily fit into an iCE40 (given that RISC-Vs are fitting and the J1 should be simpler) with the RAM external. Several of the iCE40 boards have external RAMs