FPGA dev board that's cheap, simple and supported by OSS toolchain
github.com
github.com
There are many reasons to learn about fpga's. Yes micros have their place as well and are very capable and cheap like the Nxp RT series.
nMigen is highly recommended.
For a minute there I thought you were about to quote a certain Mr Gates...
But I'm now claiming "Mr Gates" to be the name of my first FPGA project
[0]: https://tinyvision.ai/blogs/processing-at-the-edge/ground-tr...
The nucelo ones are even weirder. The pins aren't labeled on the board, and they're in a weird layout, with some male and others female.
Nah, you got it all wrong. You need to pull up the devboard's Pinout, User Guide, and Overview documents. Sometimes cross reference those to the devboard's schematic for the trickier pins. Alongside the specific User Guide and Programming manuals for the MCU on the board. Plus the MCU's guides don't typically cover stuff that's common to all MCUs in a particular Cortex family, so you need to pull up the Cortex documentation. And then, finally, the errata documents.
Typically speaking you'll need to cross reference across all of those documents, all at once, and several places _within_ each document ... all at once.
That's assuming you're using one of the more common pins. If you've decided to dabble with any of the more exotic functionalities you'll want to pull up one or several Application documents, as the former pile of documentation is unlikely to accurately describe the necessary "voodoo" to get things working.
(I kinda wish this comment was a joke ... but it's not. The STM line of chips are truly wonderful machines but ... golly are they a pain to develop on. There's a reason most people just use Arduino to plaster over this stuff.)
EDIT: Oh and make sure you don't confuse the labeling of the pins on the board, with the label of the pins on the pinout, with the label of the pins on the schematic, with the label of the pins in the registers, with the label of the pins in the various HAL libraries...
EDIT2: Geez, how could I forgot the most crucial thing: you of course have to modulate all of these by which specific package of the chip you're actually working with. No sense spending half an hour of your life wadding through all of this documentation only to get to the dev board pinout to find that pin is only available on the largest package and the dev board only came with the 2nd to largest package... (and also doesn't include that one peripheral you were planning to use because ... reasons).
For example, the RTC periph is the same on most STM32 devices. Clocks vary significantly between families, as expected, but at their core, are just different combos of multipliers and internal oscillators, which you can break out by comparing clock trees. Things like I2C vary wildly between families, and sometimes within families.
There's actually two major versions of the RTC peripheral. :) The v1 RTC counts in seconds, v2 has explicit date/time fields.
A lot of other STM32 peripherals can be seen as "versioned" in similar ways. There's a lot of different combinations of those peripherals on different parts, but there's usually only two or three major revisions present of each peripheral across the entire product line, and they tend to follow a pretty consistent timeline. (That is, a newer part will usually use the newest version of each peripheral at the time it was designed, rather than using a mixture of old and new peripherals.)
Then there's also device & device family xml files that link to the various peripherals they have [2].
There's probably no guarantees but in my experience if two devices link to the same version xml file their peripheral registers at least will be identical. Quirks and silicon bugs, you are on your own of course... but then the ref manual doesn't help with that either!
[1] https://github.com/esden/stm32cube-database/tree/master/db/m...
[2] https://github.com/esden/stm32cube-database/tree/master/db/m...
Signed,
Someone who needs 200+ pins in a current design and doesn't want to make their own board from scratch.
Exciting times!
I really hope yosys matures and is adopted in large numbers in industry, to become a de-facto gcc equivalent for FPGA compilation. Decoupling FPGA designs from the half-baked tools that vendors push out would be real progress.
I once stumbled upon an article where somebody FPGA-ed (with a much bigger board, I don't insist it has to be this small and simple) a RISC-V system to make a "RISC-V PC" and I'm thinking about getting an FPGA to explore that since then.
The mother lode of cheap, capable FPGAs seems to be supply chains for makers of TVs.
I bet most don't plan to let customers upgrade that way, instead of buying a new TV. I expect they will sell the same hardware with a different model number and just new firmware. They like changing model numbers frequently anyway to frustrate reviewers and people consulting them.
I played with it on an OrangeCrab [2], and was shocked by how easy it was to get it running and by how well it worked despite the slow clock. The FPGA design includes peripherals for GPIO, PWM, serial interfaces, etc., and the kernel includes drivers to talk to them. On the OrangeCrab, everything I thought to try pretty much just worked as expected.
That being said, this is mostly just a fun exercise in SoC building, and isn't going to give you PC-like performance. VexRiscv is small and fast and super configurable, but you're still looking at "high-end microcontroller" rather than "low-end application processor" levels of performance.
I generally recommend the iCESugar and the ULX3S, for iCE40 (UP5K) and ECP5 respectively.
I own both boards, and a few more I don't feel like recommending.
https://github.com/B-Lang-org/bsc
it's Haskell underneath (https://xkcd.com/356/)
https://www.latticesemi.com/en/Products/FPGAandCPLD/iCE40Ult...
I am not versed enough in FPGA to know if this is just a marketing rebranding of common features (apparently a focus on LUTs and add-and-multiply operations) or if it is an actual edge.
Though, if that thing can do pattern recognition in images and draws 10 mA max, that's an interesting package for $24
When would you choose FPGA over something like an STM32? From what an internet search leads to, they can be faster / do more things in parallel for the price. And you can add capabilities (More timers? More op amps?) with firmware updates. Is this at the core of when you'd choose one?
I've no experience with FPGA, but would like to learn. This is listed as "no longer available for sale". Which dev board do you recommend? Thank you.
The answer is "almost never". Qualifications below.
Learn the Cortex-M4 ecosystem first. You can do a remarkable amount of stuff by abusing microcontroller systems in weird ways. The tools for dealing with microcontrollers are MUCH better than the FPGA ecosystem tools (which suck--and that's on a good day).
If you need an FPGA, generally you know it. The first sign is: "There's no way to do this with my microcontroller." That step is generally followed by: "Is there a different microcontroller that could do this?" followed by asking the old greybeard "Is there really no way to do this on a microcontroller?" And finally, "Crud, this can't be done on a microcontroller"--at that point you can consider an FPGA.
As someone who has been dealing with this for mumble too many years, I've been slowly migrating functionality of my clients away from their FPGAs and into the microcontrollers more and more. It's just way easier on too many fronts--and they don't have to learn Verilog/VHDL. The FPGAs will never go away, but they will have the minimum functionality we can get away with.
> I've no experience with FPGA, but would like to learn.
I'm likely to get some static for this, but get an actual supported dev board and not an open-source hacker board. I would recommend something like this that has an academic version:
https://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=...
Use the manufacturer tools (which, in this instance, are free) as using an "open-source toolchain" is NOT for beginners.
Once you understand FPGA's a bit more thoroughly, then you can take the leap to the open source stuff.
As someone who learned the ropes with the open toolchain, I have to strongly disagree.
It's perfectly feasible, and from what I've seen (videos and such), the closed toolchains are way messier and do not provide much in terms of tools unless you pay for time-limited licenses. No thanks.
Perhaps Xilinx-land is different, but I have seen an intern go from blank Windows machine to "blink an LED" on an Altera board in about an hour or so with no Verlog/VHDL.
I have never seen this with the open-source toolchains.
Your experience differs. YMMV. Disclaimers. etc.
Sadly this frequently manifests as huge, Eclipse based bloatware with byzantine installation processes and comical fragility. Precious few understand the value of lightweight, robust tools and confuse elaborate graphical wizards and code generators with quality.
Source: I'm an FPGA engineer (sometimes).
This is highly dependent upon how often you use the tool.
If I do an FPGA project once every two years and the scope is less than 3 months, user-friendliness is very much a useful metric for my tools.
If I'm doing an FPGA project that is going to take 15 months, then lack of user-friendliness certainly won't stop me (but it will make me grouchy).
When someone says "beginner", I never think of someone who already knows the Unix command line.
I've been doing this for far too many years, and I'm struggling to think of anybody I know who does FPGA work and knows the UNIX command line--even among the experienced hands.
You are likely too biased in the Windows world, which is exactly what HN is not (probably! I have no data to prove that, just a hunch based on the discussions I took a part of on HN).
However, none of my colleagues in hardware design really know UNIX--neither junior nor senior.
And what's with the downvoters in this thread? Stop downvoting people because you disagree with them--COMMENT, DAMMIT.
I'm beginning to suspect that the HN "You're posting too fast" limit gets hit too quickly and people can only upvote/downvote so they default to that.
I agree with you that downvotes are useless when one simply disagrees and don't help the author or the reader learn. With the "flag" feature though, I am not sure I see the point of downvoting at all (other than when someone repeats the same disproven argument in the thread): upvoting is there to indicate "me too", but any such thing turns into a popularity context.
I could count the time to "install open tools", too, but it would be even less favorable to the proprietary toolchain. It was, after all, a single command (on Arch Linux) that finished in a few seconds at worst.
There's a lot of tutorials these days based on iCE40 and open toolchain.
Then I went on to read yosys's documentation, and learned a great deal about how the flow from verilog to hardware works in a very short amount of time, by just doing so.
Installation instructions (basically just extract the folder somewhere): https://github.com/im-tomu/fomu-toolchain
Workshop: https://github.com/esden/wtfpga
"You want to learn FPGAs! Let's simulate with Verilator. No, it can't simulate delays, or your vendor's IP library. No, it's not mixed language - hope all your IP is Verilog! And you'll need to know C or C++ to write your test bench, but that's ok right? The examples online involve templates (ZipCPU), so you're OK with Makefiles, and templated C++, obviously. Now, you have the FOSS P&R tools! They use a primitive simulated annealing placement algorithm that's like what we did in the 90's. Yeah, that's terrible, but don't worry, it works fine because the only parts you can target are really, really tiny Lattice parts! No, you can't even use all the hard blocks on the 7 series Xilinx parts - you can fit ONE whole RISC-V superscalar OoO core on the $3500 VC707 (https://github.com/csail-csg/riscy-OOO), running at ~120MHz - but I'll bet you'll do some primitive microcontroller RISC-V instead, something that fits on these really, really, REALLY tiny parts. Then you'll obviously want to augment that with Migen - don't you also know Python? Or Chisel! How great is Scala right? Yeah, it couldn't simulate a simple tri-state until version 2, but you're OK with the concept of domain specific languages already, right? You love the first-class functions and code as data concept! I know, I know. No, nobody in industry cares about any of this stuff, they're too busy using actual FPGA knowledge to like build real systems and circuits. Yeah, a microcontroller-level RISC-V style processor is a handful of undergraduate labs, but RISC-V IS OPEN! Anyway, back to FPGAs...hey where are you going?!"
[a]: They can be reconfigured (like flash program code in your PIC) instead of being write-once (like ye old PALs and GALs)
[b]: Essentially a configurable array of transistors (technically the transistor interconnects)
On a big scale, an STM (or whatever SoC you choose) is designed for running code. You tell it what to do. FPGAs, OTOH, are for when you want to tell the individual transistors how to connect to each other. When you just need to make an IOT widget, use a SoC. If you need to prototype an ASIC, use an FPGA. FPGAs allow more real time parallel applications by their nature of not being processors.
Then there’s the whole issue of FPGA vendors being terrible about interoperability. Want to use a Lattice part? You need Lattice’s toolchain. Want to use a Cyclone part? You need Intel’s “Quartus” toolchain. And those toolchains are multi-gigabyte monsters. Contrast that with a PIC where you can use pretty much any retargetable compiler and any USB-COM tool.
Of course, you still have to make the FGPA do something. An advantage of an FPGA over an STM32 would be if you're willing to invest some time in hardware description languages (HDLs) like VHDL or Verilog to design your own system, or want to drop in novel cores (like RISC-V) that aren't physically available yet or are still in a state of flux. RISC-V isn't fully specified yet so a "soft" core version on an FPGA offers you the ability to upgrade your device without needing to actually purchase a new one, and remove and replace the old one.
In theory, an Arduino compatible FPGA-based device could be used to develop applications totally sans software (that is, all the logic is encoded in the HDL) as well, which can be advantageous in prototyping, and maybe in performance depending on the FPGA in question.
FPGA's can't do that (or at least one's mere mortals can buy), but Cypress have a line of parts called PSoC (programmable system on chip) which can effectively synthesize analogue cells like op-amps in an analogous way to an FPGA. They also have a cut-down (surprised?) version of verilog, so you can write a few CPLD-y verilog modules to go on it as well.
The dev boards are very reasonably priced, well worth having one around to play with - can't comment on using them at scale. Cypress have some pretty good video lecture/tutorials on using them by Alan Hawse (Who is very stereotype-engineer https://youtu.be/0IKuUgEWAqg)
Essentially for the same reason you choose to use a GPU instead of a CPU. FPGAs deliver application specific circuitry that outperforms a general purpose device. Typically these are high throughput applications; signal processing (SDR), image processing (find the license plates), audio processing etc. While it might be conceivable to do many of these tasks with very fast MCUs, often there are power budgets or other constraints that can't be met.
For example, imagine your application might be handled by either a.) STM32F4 running full tilt at 160 MHz or b.) an iCE5LP4K at 50 MHz. The former could consume just south of 200mW, whereas the latter might be around 10mW. That's a very big difference when you're running on a 100mAh embedded lipo battery or 40mAh coin cell.
Lattice has a line called PolarFire which combines a fairly big FPGA and a RISC-V core, but they're very expensive, so I doubt I'll have my hands on one for a while.
If I ever luck into the big money, I know for sure I'm going to bankrupt myself buying toys like https://www.xilinx.com/products/silicon-devices/soc/rfsoc.ht...
The ULX3S FPGA board has the Lattice ECP5 FPGA, and an ESP32 that connects to wifi and can reprogram the FPGA.
I wouldn't call it expensive (~$60) and it's pretty simple.
The toolchain by Lattice however is not the best