Linus Torvalds rails at Intel for 'killing' the ECC industry | Hacker News Reader

Linus Torvalds rails at Intel for 'killing' the ECC industry

theregister.com

77 pointsrossjudson11 comments

Open articleView on HN

Can we switch the url to the actual thread with Linus talking?

https://www.realworldtech.com/forum/?threadid=198497&curpost...

It was on the front page of HN yesterday https://news.ycombinator.com/item?id=25622322

I suppose it could have used a better title?

Apple M1 seems to have ECC.

> AppleFireStormErrorHandler AppleARM64ErrorHandler: will not panic on correctible ECC errors

> Firestorm are the four high-performance CPU cores in the M1.[1]

[1]- https://www.google.com/amp/s/eclecticlight.co/2020/12/09/wha...

I don’t think there’s any LPDDR4 4266 available with ECC, so it couldn’t use it. The error message probably just indicates M1 supports ECC as an option.

Wouldn't be surprised if this is for the inevitable multi-socket, high-bandwidth M2Z in the inevitable $5,000 Apple Silicon Mac Pro in a few years' time

Which would be worth every penny, gauging from the M1.

so ah for what it's worth, leak today was that the next chip is a 12 core m2z, offered as soon as March[1]. rumors. but very believable.

current m1 is supposedly 16b transistors at 5nm, a scant 116mm^2. compare to current 7n graphics chips such as an amd 6900 which is 26b transistors & >500mm^2. also notable, the 8 cores on the m1 are only 1/3 of the chip size. it's gpu is bigger. suffice it to say, adding another 50% more cores is not gonna be a problem nor affect yields a lot. if apple wanted to, for whatever reason, dedicate more of that core space to cpu, & chop off that cpu, well, that'd be something.

that said, yeah, a multi-socket m[x] chip might not be in the cards for 2021. or maybe it is. anyhow the rumor mill has been floating the ideas of an "m2x" and "m2z" follow up being launched this year; this is just further "suggestion"/priming that we may see one, or two follow ups.

[1] https://www.notebookcheck.net/Next-gen-Macs-set-to-feature-1...

It looks to be on-chip in M1:

> The M1 uses 4266 MT/s LPDDR4X SDRAM[9] in a unified memory configuration shared by all the components of the processor.[1]

[1]- https://en.m.wikipedia.org/wiki/Apple_M1

By “it” you mean the chips have 4266 MT/s LPDDR4X SDRAM and not ECC, right?

complaint checks out. one of the core ways intel discriminates it's high priced versus consumer chips.

basically we need a couple solar events it seems that convince us this is horseshit & unacceptsble. & that like 4% extra ram storage (and like 0.001% cpu complexity) for some modest protection doesn't deserve a 200% increase in processor price. meanwhile folks lovimg at altitude & in the sky just have to deal. iirc amd has not supported officially but allowed ecc on basically all chips in the last nearly 20 years.

one of the classic signs that capitalism will always only deliver what markets dont revolt against. farcically ill served, by design.

there was a fairly recent question on reddit about why cpu architectures are rarely designed to protect against bit-flips, but ram often is[1]. among other things i ran into a wikipedia article on Soft Errors[2] that talked to a lot of means of failure (atmospheric showers of secondary energetic particles, typically), & terms like Critical Charge, which registered strongly with my engineering undergrad background. it made me a bit miffed that there are a lot of domains of computing that receive no protection, which is absurd given how trivial adding protection would be.

anyhow, the rest of Linus's comments are great & on target. he talks about ThreadRipper & chiplets being much easier to scale. intel charging geometrically more as you ask for more, where-as amd charges linearly more. his comments that yes, threadripper motherboards are more expensive, but in line with overall price rings true.

it's interesting days. we went "glueless" years ago: removed the north-bridge & integrated it's capabilities, enabled direct cpu-to-cpu communication, moved the ram controller onboard. under-discussed, but AMD's innovation is almost entirely winding back the clock on that: there is now an i/o die is a large-process (14nm) chip that: talks to main memory, talks to whatever cpu dies are available, exposes a ton of pcie/sata. the only difference versus the 90's &c is that, this time, the northbridge is on-package.

i do think there are some missing amd offering still. when zen was being announced, there were supposedly going to be very very low cost motherboard offerings featuring "x300" chipsets, which were basically no-chipsets, just some boot-loader code. makes sense when you have gobs of pcie, memory, on package. you can still find the x300, & now b300, a300 mentioned[3] if you go to the am4 chipset section, but these seem like vapor launches, & i don't feel like the effort to reduce the motherboard complexity really developed. again another tension in amd's world, like SeaMicro: no one actually making products supporting AMD's offerings wants to be involved in a race to the bottom. they want to continue to sell expensive, complex, deluxe add-ons. the tension is real.

[1] https://old.reddit.com/r/cpudesign/comments/kdhoep/if_ram_an...

[2] https://en.wikipedia.org/wiki/Soft_error

[3] https://www.amd.com/en/products/chipsets-am4

Reply on news.ycombinator.com