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Comment by dmmalam | Hacker News Reader

I assume SVE [1]/ SVE2 [2] will be implemented in future Apple Silicon processors. Possibly along with ARMv9.

[1] https://community.arm.com/developer/tools-software/hpc/b/hpc... [2] https://community.arm.com/developer/ip-products/processors/b...

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SVE is interesting because it gives you forward binary compatibility. i.e. your binary, written for a 128bit wide vector unit, will benefit directly from a newer 256bit wide unit without recompilation.

Who says they don't already support SVE; is it publicly known they support it or not? Especially if the binary doesn't have to be recompiled you'd never know whether they implemented it or not right?

You can just try the instructions with an off-the-shelf assembler. They're not supported.

I’m kind of interested about what happens if you throw random opcodes at processors now!

I would guess the processor would just cause an exception/interrupt and it would just call an OS level exception/interrupt handler which would probably tell the user what the exception/interrupt was that occured; in this case an unsupported instruction.

I believe most processors have undocumented opcodes. Often used for internal debugging or similar.

You might be interested in sandsifter [0], which does precisely that!

[0]: https://github.com/xoreaxeaxeax/sandsifter

Your program will crash with SIGILL.

Unless you have to toggle an MSR, of course…

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